44 lines
2.0 KiB
Plaintext
44 lines
2.0 KiB
Plaintext
--lpm_divide DEVICE_FAMILY="Cyclone IV E" LPM_DREPRESENTATION="UNSIGNED" LPM_NREPRESENTATION="UNSIGNED" LPM_WIDTHD=7 LPM_WIDTHN=16 OPTIMIZE_FOR_SPEED=5 denom numer quotient CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48 IGNORE_CARRY_BUFFERS="OFF"
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--VERSION_BEGIN 25.1 cbx_cycloneii 2025:10:22:10:31:27:SC cbx_lpm_abs 2025:10:22:10:31:27:SC cbx_lpm_add_sub 2025:10:22:10:31:27:SC cbx_lpm_divide 2025:10:22:10:31:27:SC cbx_mgl 2025:10:22:10:31:44:SC cbx_nadder 2025:10:22:10:31:27:SC cbx_stratix 2025:10:22:10:31:27:SC cbx_stratixii 2025:10:22:10:31:26:SC cbx_util_mgl 2025:10:22:10:31:27:SC VERSION_END
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-- Copyright (C) 2025 Altera Corporation. All rights reserved.
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-- Your use of Altera Corporation's design tools, logic functions
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-- and other software and tools, and any partner logic
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-- functions, and any output files from any of the foregoing
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-- (including device programming or simulation files), and any
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-- associated documentation or information are expressly subject
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-- to the terms and conditions of the Altera Program License
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-- Subscription Agreement, the Altera Quartus Prime License Agreement,
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-- the Altera IP License Agreement, or other applicable license
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-- agreement, including, without limitation, that your use is for
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-- the sole purpose of programming logic devices manufactured by
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-- Altera and sold by Altera or its authorized distributors. Please
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-- refer to the Altera Software License Subscription Agreements
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-- on the Quartus Prime software download page.
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FUNCTION sign_div_unsign_tlh (denominator[6..0], numerator[15..0])
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RETURNS ( quotient[15..0], remainder[6..0]);
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--synthesis_resources = lut 111
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SUBDESIGN lpm_divide_5jm
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(
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denom[6..0] : input;
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numer[15..0] : input;
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quotient[15..0] : output;
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remain[6..0] : output;
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)
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VARIABLE
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divider : sign_div_unsign_tlh;
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numer_tmp[15..0] : WIRE;
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BEGIN
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divider.denominator[] = denom[];
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divider.numerator[] = numer_tmp[];
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numer_tmp[] = numer[];
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quotient[] = divider.quotient[];
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remain[] = divider.remainder[];
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END;
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--VALID FILE
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