92 lines
4.0 KiB
Plaintext
92 lines
4.0 KiB
Plaintext
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Assembler report for lvds_monitor
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Wed Jun 10 09:07:09 2026
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Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
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---------------------
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; Table of Contents ;
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---------------------
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1. Legal Notice
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2. Assembler Summary
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3. Assembler Settings
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4. Assembler Generated Files
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5. Assembler Device Options: C:/Users/DavidRice/Documents/fpga/lvds_monitor/lvds_monitor.sof
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6. Assembler Messages
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----------------
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; Legal Notice ;
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----------------
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Copyright (C) 2025 Altera Corporation. All rights reserved.
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Your use of Altera Corporation's design tools, logic functions
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and other software and tools, and any partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Altera Program License
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Subscription Agreement, the Altera Quartus Prime License Agreement,
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the Altera IP License Agreement, or other applicable license
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agreement, including, without limitation, that your use is for
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the sole purpose of programming logic devices manufactured by
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Altera and sold by Altera or its authorized distributors. Please
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refer to the Altera Software License Subscription Agreements
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on the Quartus Prime software download page.
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+---------------------------------------------------------------+
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; Assembler Summary ;
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+-----------------------+---------------------------------------+
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; Assembler Status ; Successful - Wed Jun 10 09:07:09 2026 ;
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; Revision Name ; lvds_monitor ;
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; Top-level Entity Name ; top ;
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; Family ; Cyclone IV E ;
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; Device ; EP4CE6E22C8 ;
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+-----------------------+---------------------------------------+
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+----------------------------------+
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; Assembler Settings ;
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+--------+---------+---------------+
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; Option ; Setting ; Default Value ;
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+--------+---------+---------------+
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+-----------------------------------------------------------------+
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; Assembler Generated Files ;
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+-----------------------------------------------------------------+
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; File Name ;
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+-----------------------------------------------------------------+
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; C:/Users/DavidRice/Documents/fpga/lvds_monitor/lvds_monitor.sof ;
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+-----------------------------------------------------------------+
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+-------------------------------------------------------------------------------------------+
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; Assembler Device Options: C:/Users/DavidRice/Documents/fpga/lvds_monitor/lvds_monitor.sof ;
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+----------------+--------------------------------------------------------------------------+
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; Option ; Setting ;
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+----------------+--------------------------------------------------------------------------+
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; JTAG usercode ; 0x001B1109 ;
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; Checksum ; 0x001B1109 ;
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+----------------+--------------------------------------------------------------------------+
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+--------------------+
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; Assembler Messages ;
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+--------------------+
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Info: *******************************************************************
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Info: Running Quartus Prime Assembler
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Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
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Info: Processing started: Wed Jun 10 09:07:08 2026
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Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off lvds_monitor -c lvds_monitor
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Info (115031): Writing out detailed assembly data for power analysis
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Info (115030): Assembler is generating device programming files
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Info: Quartus Prime Assembler was successful. 0 errors, 0 warnings
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Info: Peak virtual memory: 4744 megabytes
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Info: Processing ended: Wed Jun 10 09:07:09 2026
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Info: Elapsed time: 00:00:01
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Info: Total CPU time (on all processors): 00:00:01
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