Assembler report for lvds_monitor Wed Jun 10 09:07:09 2026 Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition --------------------- ; Table of Contents ; --------------------- 1. Legal Notice 2. Assembler Summary 3. Assembler Settings 4. Assembler Generated Files 5. Assembler Device Options: C:/Users/DavidRice/Documents/fpga/lvds_monitor/lvds_monitor.sof 6. Assembler Messages ---------------- ; Legal Notice ; ---------------- Copyright (C) 2025 Altera Corporation. All rights reserved. Your use of Altera Corporation's design tools, logic functions and other software and tools, and any partner logic functions, and any output files from any of the foregoing (including device programming or simulation files), and any associated documentation or information are expressly subject to the terms and conditions of the Altera Program License Subscription Agreement, the Altera Quartus Prime License Agreement, the Altera IP License Agreement, or other applicable license agreement, including, without limitation, that your use is for the sole purpose of programming logic devices manufactured by Altera and sold by Altera or its authorized distributors. Please refer to the Altera Software License Subscription Agreements on the Quartus Prime software download page. +---------------------------------------------------------------+ ; Assembler Summary ; +-----------------------+---------------------------------------+ ; Assembler Status ; Successful - Wed Jun 10 09:07:09 2026 ; ; Revision Name ; lvds_monitor ; ; Top-level Entity Name ; top ; ; Family ; Cyclone IV E ; ; Device ; EP4CE6E22C8 ; +-----------------------+---------------------------------------+ +----------------------------------+ ; Assembler Settings ; +--------+---------+---------------+ ; Option ; Setting ; Default Value ; +--------+---------+---------------+ +-----------------------------------------------------------------+ ; Assembler Generated Files ; +-----------------------------------------------------------------+ ; File Name ; +-----------------------------------------------------------------+ ; C:/Users/DavidRice/Documents/fpga/lvds_monitor/lvds_monitor.sof ; +-----------------------------------------------------------------+ +-------------------------------------------------------------------------------------------+ ; Assembler Device Options: C:/Users/DavidRice/Documents/fpga/lvds_monitor/lvds_monitor.sof ; +----------------+--------------------------------------------------------------------------+ ; Option ; Setting ; +----------------+--------------------------------------------------------------------------+ ; JTAG usercode ; 0x001B1109 ; ; Checksum ; 0x001B1109 ; +----------------+--------------------------------------------------------------------------+ +--------------------+ ; Assembler Messages ; +--------------------+ Info: ******************************************************************* Info: Running Quartus Prime Assembler Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition Info: Processing started: Wed Jun 10 09:07:08 2026 Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off lvds_monitor -c lvds_monitor Info (115031): Writing out detailed assembly data for power analysis Info (115030): Assembler is generating device programming files Info: Quartus Prime Assembler was successful. 0 errors, 0 warnings Info: Peak virtual memory: 4744 megabytes Info: Processing ended: Wed Jun 10 09:07:09 2026 Info: Elapsed time: 00:00:01 Info: Total CPU time (on all processors): 00:00:01