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David Rice
2026-04-08 16:08:35 +01:00
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32g4xx_hal.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
#define ROW_1_Pin GPIO_PIN_0
#define ROW_1_GPIO_Port GPIOA
#define ROW_2_Pin GPIO_PIN_1
#define ROW_2_GPIO_Port GPIOA
#define USART2_TX_Pin GPIO_PIN_2
#define USART2_TX_GPIO_Port GPIOA
#define USART2_RX_Pin GPIO_PIN_3
#define USART2_RX_GPIO_Port GPIOA
#define ROW_0_Pin GPIO_PIN_0
#define ROW_0_GPIO_Port GPIOB
#define ROW_6_Pin GPIO_PIN_8
#define ROW_6_GPIO_Port GPIOA
#define ROW_5_Pin GPIO_PIN_11
#define ROW_5_GPIO_Port GPIOA
#define T_SWDIO_Pin GPIO_PIN_13
#define T_SWDIO_GPIO_Port GPIOA
#define T_SWCLK_Pin GPIO_PIN_14
#define T_SWCLK_GPIO_Port GPIOA
#define T_SWO_Pin GPIO_PIN_3
#define T_SWO_GPIO_Port GPIOB
#define ROW_3_Pin GPIO_PIN_4
#define ROW_3_GPIO_Port GPIOB
#define ROW_4_Pin GPIO_PIN_5
#define ROW_4_GPIO_Port GPIOB
#define LED_Pin GPIO_PIN_8
#define LED_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
#ifdef __cplusplus
}
#endif
#endif /* __MAIN_H */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32g4xx_hal_conf.h
* @author MCD Application Team
* @brief HAL configuration file
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32G4xx_HAL_CONF_H
#define STM32G4xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
/*#define HAL_ADC_MODULE_ENABLED */
/*#define HAL_COMP_MODULE_ENABLED */
/*#define HAL_CORDIC_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
/*#define HAL_FDCAN_MODULE_ENABLED */
/*#define HAL_FMAC_MODULE_ENABLED */
/*#define HAL_HRTIM_MODULE_ENABLED */
/*#define HAL_IRDA_MODULE_ENABLED */
/*#define HAL_IWDG_MODULE_ENABLED */
/*#define HAL_I2C_MODULE_ENABLED */
/*#define HAL_I2S_MODULE_ENABLED */
/*#define HAL_LPTIM_MODULE_ENABLED */
/*#define HAL_NAND_MODULE_ENABLED */
/*#define HAL_NOR_MODULE_ENABLED */
/*#define HAL_OPAMP_MODULE_ENABLED */
/*#define HAL_PCD_MODULE_ENABLED */
/*#define HAL_QSPI_MODULE_ENABLED */
/*#define HAL_RNG_MODULE_ENABLED */
/*#define HAL_RTC_MODULE_ENABLED */
/*#define HAL_SAI_MODULE_ENABLED */
/*#define HAL_SMARTCARD_MODULE_ENABLED */
/*#define HAL_SMBUS_MODULE_ENABLED */
#define HAL_SPI_MODULE_ENABLED
/*#define HAL_SRAM_MODULE_ENABLED */
/*#define HAL_TIM_MODULE_ENABLED */
#define HAL_UART_MODULE_ENABLED
/*#define HAL_USART_MODULE_ENABLED */
/*#define HAL_WWDG_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
/* ########################## Register Callbacks selection ############################## */
/**
* @brief This is the list of modules where register callback can be used
*/
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
#define USE_HAL_UART_REGISTER_CALLBACKS 0U
#define USE_HAL_USART_REGISTER_CALLBACKS 0U
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
/* ########################## Oscillator Values adaptation ####################*/
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE (8000000UL) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
* This internal oscillator is mainly dedicated to provide a high precision clock to
* the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
* When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
* which is subject to manufacturing process variations.
*/
#if !defined (HSI48_VALUE)
#define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
The real value my vary depending on manufacturing process variations.*/
#endif /* HSI48_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
/*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations in voltage and temperature.*/
#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
#endif /* LSI_VALUE */
/**
* @brief External Low Speed oscillator (LSE) value.
* This value is used by the UART, RTC HAL module to compute the system frequency
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
#endif /* LSE_STARTUP_TIMEOUT */
/**
* @brief External clock source for I2S and SAI peripherals
* This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
* frequency, this source is inserted directly through I2S_CKIN pad.
*/
#if !defined (EXTERNAL_CLOCK_VALUE)
#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
#endif /* EXTERNAL_CLOCK_VALUE */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
#define USE_RTOS 0U
#define PREFETCH_ENABLE 0U
#define INSTRUCTION_CACHE_ENABLE 1U
#define DATA_CACHE_ENABLE 1U
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1U */
/* ################## SPI peripheral configuration ########################## */
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
* Activated: CRC code is present inside driver
* Deactivated: CRC code cleaned from driver
*/
#define USE_SPI_CRC 0U
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32g4xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32g4xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32g4xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32g4xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32g4xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_COMP_MODULE_ENABLED
#include "stm32g4xx_hal_comp.h"
#endif /* HAL_COMP_MODULE_ENABLED */
#ifdef HAL_CORDIC_MODULE_ENABLED
#include "stm32g4xx_hal_cordic.h"
#endif /* HAL_CORDIC_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32g4xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32g4xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32g4xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32g4xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */
#ifdef HAL_FDCAN_MODULE_ENABLED
#include "stm32g4xx_hal_fdcan.h"
#endif /* HAL_FDCAN_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32g4xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_FMAC_MODULE_ENABLED
#include "stm32g4xx_hal_fmac.h"
#endif /* HAL_FMAC_MODULE_ENABLED */
#ifdef HAL_HRTIM_MODULE_ENABLED
#include "stm32g4xx_hal_hrtim.h"
#endif /* HAL_HRTIM_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32g4xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32g4xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32g4xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32g4xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_LPTIM_MODULE_ENABLED
#include "stm32g4xx_hal_lptim.h"
#endif /* HAL_LPTIM_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32g4xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32g4xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_OPAMP_MODULE_ENABLED
#include "stm32g4xx_hal_opamp.h"
#endif /* HAL_OPAMP_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32g4xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32g4xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_QSPI_MODULE_ENABLED
#include "stm32g4xx_hal_qspi.h"
#endif /* HAL_QSPI_MODULE_ENABLED */
#ifdef HAL_RNG_MODULE_ENABLED
#include "stm32g4xx_hal_rng.h"
#endif /* HAL_RNG_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32g4xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SAI_MODULE_ENABLED
#include "stm32g4xx_hal_sai.h"
#endif /* HAL_SAI_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32g4xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32g4xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32g4xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32g4xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32g4xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32g4xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32g4xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32g4xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t *file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* STM32G4xx_HAL_CONF_H */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32g4xx_it.h
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32G4xx_IT_H
#define __STM32G4xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void USART2_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
#ifdef __cplusplus
}
#endif
#endif /* __STM32G4xx_IT_H */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include <string.h>
#include <stdint.h>
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
#define ROWS 7
#define COLS 96
#define NUM_CHIPS 12 /* 12 x 8 bits = 96 column bits */
#define ROW_DWELL 500 /* microseconds per row — tune for flicker/ghosting */
#define UART_BUF 128
#define WIDE_COLS 512 /* pre-render buffer width */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
SPI_HandleTypeDef hspi1;
UART_HandleTypeDef huart2;
/* USER CODE BEGIN PV */
/* Row pin lookup — matches CubeMX GPIO labels */
typedef struct { GPIO_TypeDef *port; uint16_t pin; } RowPin;
static const RowPin ROW_PINS[ROWS] = {
{ROW_0_GPIO_Port, ROW_0_Pin}, /* ROW_0 — PB0 */
{ROW_1_GPIO_Port, ROW_1_Pin}, /* ROW_1 — PA0 */
{ROW_2_GPIO_Port, ROW_2_Pin}, /* ROW_2 — PA1 */
{ROW_3_GPIO_Port, ROW_3_Pin}, /* ROW_3 — PB4 */
{ROW_4_GPIO_Port, ROW_4_Pin}, /* ROW_4 — PB5 */
{ROW_5_GPIO_Port, ROW_5_Pin}, /* ROW_5 — PA11 */
{ROW_6_GPIO_Port, ROW_6_Pin}, /* ROW_6 — PA8 */
};
/* Framebuffer — fb[row][chip], each byte = 8 column bits */
static uint8_t fb[ROWS][NUM_CHIPS];
/* Pre-rendered wide scroll buffer */
static uint8_t wide[ROWS][WIDE_COLS];
static uint16_t wide_cols = 0; /* 0 = no message yet, display stays blank */
static int32_t scroll_x = 0;
/* UART receive */
static uint8_t uart_rx_byte;
static char uart_buf[UART_BUF];
static uint8_t uart_idx = 0;
static uint8_t new_message = 0;
static char message[UART_BUF] = "";
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_SPI1_Init(void);
static void MX_USART2_UART_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* 5x7 font, ASCII 32-90
Each glyph = 5 bytes (columns), bit0 = top row */
static const uint8_t FONT[][5] = {
{0x00,0x00,0x00,0x00,0x00}, /* ' ' 32 */
{0x00,0x00,0x5F,0x00,0x00}, /* '!' */
{0x00,0x07,0x00,0x07,0x00}, /* '"' */
{0x14,0x7F,0x14,0x7F,0x14}, /* '#' */
{0x24,0x2A,0x7F,0x2A,0x12}, /* '$' */
{0x23,0x13,0x08,0x64,0x62}, /* '%' */
{0x36,0x49,0x55,0x22,0x50}, /* '&' */
{0x00,0x05,0x03,0x00,0x00}, /* ''' */
{0x00,0x1C,0x22,0x41,0x00}, /* '(' */
{0x00,0x41,0x22,0x1C,0x00}, /* ')' */
{0x08,0x2A,0x1C,0x2A,0x08}, /* '*' */
{0x08,0x08,0x3E,0x08,0x08}, /* '+' */
{0x00,0x50,0x30,0x00,0x00}, /* ',' */
{0x08,0x08,0x08,0x08,0x08}, /* '-' */
{0x00,0x60,0x60,0x00,0x00}, /* '.' */
{0x20,0x10,0x08,0x04,0x02}, /* '/' */
{0x3E,0x51,0x49,0x45,0x3E}, /* '0' */
{0x00,0x42,0x7F,0x40,0x00}, /* '1' */
{0x42,0x61,0x51,0x49,0x46}, /* '2' */
{0x21,0x41,0x45,0x4B,0x31}, /* '3' */
{0x18,0x14,0x12,0x7F,0x10}, /* '4' */
{0x27,0x45,0x45,0x45,0x39}, /* '5' */
{0x3C,0x4A,0x49,0x49,0x30}, /* '6' */
{0x01,0x71,0x09,0x05,0x03}, /* '7' */
{0x36,0x49,0x49,0x49,0x36}, /* '8' */
{0x06,0x49,0x49,0x29,0x1E}, /* '9' */
{0x00,0x36,0x36,0x00,0x00}, /* ':' */
{0x00,0x56,0x36,0x00,0x00}, /* ';' */
{0x00,0x08,0x14,0x22,0x41}, /* '<' */
{0x14,0x14,0x14,0x14,0x14}, /* '=' */
{0x41,0x22,0x14,0x08,0x00}, /* '>' */
{0x02,0x01,0x51,0x09,0x06}, /* '?' */
{0x32,0x49,0x79,0x41,0x3E}, /* '@' */
{0x7E,0x09,0x09,0x09,0x7E}, /* 'A' */
{0x7F,0x49,0x49,0x49,0x36}, /* 'B' */
{0x3E,0x41,0x41,0x41,0x22}, /* 'C' */
{0x7F,0x41,0x41,0x41,0x3E}, /* 'D' */
{0x7F,0x49,0x49,0x49,0x41}, /* 'E' */
{0x7F,0x09,0x09,0x09,0x01}, /* 'F' */
{0x3E,0x41,0x49,0x49,0x7A}, /* 'G' */
{0x7F,0x08,0x08,0x08,0x7F}, /* 'H' */
{0x41,0x7F,0x41,0x00,0x00}, /* 'I' */
{0x20,0x40,0x41,0x3F,0x01}, /* 'J' */
{0x7F,0x08,0x14,0x22,0x41}, /* 'K' */
{0x7F,0x40,0x40,0x40,0x40}, /* 'L' */
{0x7F,0x02,0x04,0x02,0x7F}, /* 'M' */
{0x7F,0x04,0x08,0x10,0x7F}, /* 'N' */
{0x3E,0x41,0x41,0x41,0x3E}, /* 'O' */
{0x7F,0x09,0x09,0x09,0x06}, /* 'P' */
{0x3E,0x41,0x51,0x21,0x5E}, /* 'Q' */
{0x7F,0x09,0x19,0x29,0x46}, /* 'R' */
{0x46,0x49,0x49,0x49,0x31}, /* 'S' */
{0x01,0x01,0x7F,0x01,0x01}, /* 'T' */
{0x3F,0x40,0x40,0x40,0x3F}, /* 'U' */
{0x1F,0x20,0x40,0x20,0x1F}, /* 'V' */
{0x7F,0x20,0x10,0x20,0x7F}, /* 'W' */
{0x63,0x14,0x08,0x14,0x63}, /* 'X' */
{0x03,0x04,0x78,0x04,0x03}, /* 'Y' */
{0x61,0x51,0x49,0x45,0x43}, /* 'Z' */
};
/* ── Microsecond busy-wait using DWT cycle counter ── */
static void delay_us(uint32_t us)
{
uint32_t start = DWT->CYCCNT;
uint32_t ticks = (SystemCoreClock / 1000000U) * us;
while ((DWT->CYCCNT - start) < ticks);
}
/* ── Turn all row pins off (HIGH = ULN2803A pulls gate low = MOSFET off) ── */
static void all_rows_off(void)
{
for (int i = 0; i < ROWS; i++)
HAL_GPIO_WritePin(ROW_PINS[i].port, ROW_PINS[i].pin, GPIO_PIN_SET);
}
/* ── Send one row of column data via SPI then enable that row ── */
static void display_refresh(void)
{
for (int row = 0; row < ROWS; row++) {
all_rows_off();
HAL_SPI_Transmit(&hspi1, fb[row], NUM_CHIPS, HAL_MAX_DELAY);
/* LOW = ULN2803A releases gate = MOSFET on = row enabled */
HAL_GPIO_WritePin(ROW_PINS[row].port, ROW_PINS[row].pin, GPIO_PIN_RESET);
delay_us(ROW_DWELL);
}
all_rows_off();
}
/* ── Render message string into wide[] pixel buffer ── */
static void render_message(const char *msg)
{
memset(wide, 0, sizeof(wide));
uint16_t col = COLS; /* lead with one blank screen so text scrolls in */
while (*msg && col < (WIDE_COLS - 6)) {
uint8_t c = (uint8_t)*msg++;
/* Convert lowercase to uppercase */
if (c >= 'a' && c <= 'z') c -= 32;
if (c >= 32 && c <= 90) {
const uint8_t *glyph = FONT[c - 32];
for (int g = 0; g < 5 && col < WIDE_COLS; g++, col++) {
for (int row = 0; row < ROWS; row++) {
wide[row][col] = (glyph[g] >> row) & 1;
}
}
}
col++; /* one gap column between characters */
}
wide_cols = col + COLS; /* scroll until text fully exits left edge */
scroll_x = 0;
}
/* ── Copy current scroll window from wide[] into fb[][] ── */
static void update_fb_from_scroll(void)
{
for (int row = 0; row < ROWS; row++) {
memset(fb[row], 0, NUM_CHIPS);
for (int col = 0; col < COLS; col++) {
uint16_t src = (uint16_t)(scroll_x + col);
if (src < WIDE_COLS && wide[row][src]) {
int chip = col / 8;
int bit = 7 - (col % 8);
fb[row][chip] |= (uint8_t)(1 << bit);
}
}
}
}
/* ── Arrive north star pixel map, 7 rows x 11 cols ── */
static const uint8_t STAR[7][11] = {
{0,0,0,0,1,0,0,0,0,0,0},
{0,0,0,1,1,1,0,0,0,0,0},
{1,1,0,0,1,0,0,1,1,1,1},
{1,1,1,1,1,1,1,1,1,1,1},
{1,1,0,0,1,0,0,1,1,1,1},
{0,0,0,1,1,1,0,0,0,0,0},
{0,0,0,0,1,0,0,0,0,0,0},
};
/* ARRIVE — 6 chars, each 5 cols wide + 1 col gap = 36 cols total
Rows 0-6, col order left to right: A R R I V E */
static const uint8_t ARRIVE_GLYPH[7][36] = {
/* A R R I V E */
/* r0 */ {0,1,1,1,0,0, 0,1,1,1,0,0, 0,1,1,1,0,0, 0,1,1,1,0,0, 1,0,0,0,1,0, 1,1,1,1,1,0},
/* r1 */ {1,0,0,0,1,0, 1,0,0,0,1,0, 1,0,0,0,1,0, 0,0,1,0,0,0, 1,0,0,0,1,0, 1,0,0,0,0,0},
/* r2 */ {1,0,0,0,1,0, 1,0,0,0,1,0, 1,0,0,0,1,0, 0,0,1,0,0,0, 1,0,0,0,1,0, 1,0,0,0,0,0},
/* r3 */ {1,1,1,1,1,0, 1,1,1,1,0,0, 1,1,1,1,0,0, 0,0,1,0,0,0, 0,1,0,1,0,0, 1,1,1,1,0,0},
/* r4 */ {1,0,0,0,1,0, 1,0,1,0,0,0, 1,0,1,0,0,0, 0,0,1,0,0,0, 0,1,0,1,0,0, 1,0,0,0,0,0},
/* r5 */ {1,0,0,0,1,0, 1,0,0,1,0,0, 1,0,0,1,0,0, 0,0,1,0,0,0, 0,0,1,0,0,0, 1,0,0,0,0,0},
/* r6 */ {1,0,0,0,1,0, 1,0,0,0,1,0, 1,0,0,0,1,0, 0,1,1,1,0,0, 0,0,1,0,0,0, 1,1,1,1,1,0},
};
/* ── Render logo into fb
mask_col: columns < mask_col are hidden (wipe reveals right-to-left), -1 = show all ── */
static void render_logo(int star_col, int text_col, int mask_col)
{
memset(fb, 0, sizeof(fb));
/* Draw star */
for (int row = 0; row < 7; row++) {
for (int sc = 0; sc < 11; sc++) {
int col = star_col + sc;
if (col >= 0 && col < COLS && STAR[row][sc]) {
if (mask_col < 0 || col >= mask_col) {
int chip = col / 8;
int bit = 7 - (col % 8);
fb[row][chip] |= (uint8_t)(1 << bit);
}
}
}
}
/* Draw ARRIVE text */
for (int row = 0; row < 7; row++) {
for (int tc = 0; tc < 36; tc++) {
int col = text_col + tc;
if (col >= 0 && col < COLS && ARRIVE_GLYPH[row][tc]) {
if (mask_col < 0 || col >= mask_col) {
int chip = col / 8;
int bit = 7 - (col % 8);
fb[row][chip] |= (uint8_t)(1 << bit);
}
}
}
}
}
/* ── Blank fb but keep specific rows lit (bitmask) ── */
static void render_logo_rows(int star_col, int text_col, uint8_t row_mask)
{
memset(fb, 0, sizeof(fb));
for (int row = 0; row < 7; row++) {
if (!(row_mask & (1 << row))) continue;
for (int sc = 0; sc < 11; sc++) {
int col = star_col + sc;
if (col >= 0 && col < COLS && STAR[row][sc]) {
int chip = col / 8; int bit = 7 - (col % 8);
fb[row][chip] |= (uint8_t)(1 << bit);
}
}
for (int tc = 0; tc < 30; tc++) {
int col = text_col + tc;
if (col >= 0 && col < COLS && ARRIVE_GLYPH[row][tc]) {
int chip = col / 8; int bit = 7 - (col % 8);
fb[row][chip] |= (uint8_t)(1 << bit);
}
}
}
}
/* ── Refresh for a given number of milliseconds ── */
static void refresh_for(uint32_t ms)
{
uint32_t t = HAL_GetTick();
while ((HAL_GetTick() - t) < ms) { display_refresh(); }
}
/* ── Arrive boot animation ── */
static void arrive_animation(void)
{
/* Logo layout — text LEFT, star RIGHT:
ARRIVE = 36 cols, gap = 2, star = 11 cols → total = 49 cols
centred on 96: start = (96 - 49) / 2 = 23
text_col = 23, star_col = 23 + 36 + 2 = 61 */
const int text_col = 23;
const int star_col = 61;
/* ── Phase 1: Star builds from centre outward ── */
/* Frame 1 — just centre cross */
memset(fb, 0, sizeof(fb));
for (int row = 0; row < 7; row++) {
int col = star_col + 4; /* centre column of star */
int chip = col / 8; int bit = 7 - (col % 8);
fb[row][chip] |= (uint8_t)(1 << bit);
}
/* horizontal bar centre */
for (int sc = 3; sc <= 5; sc++) {
int col = star_col + sc;
int chip = col / 8; int bit = 7 - (col % 8);
fb[3][chip] |= (uint8_t)(1 << bit);
}
refresh_for(120);
/* Frame 2 — inner star shape */
memset(fb, 0, sizeof(fb));
for (int row = 0; row < 7; row++) {
for (int sc = 3; sc <= 7; sc++) {
if (STAR[row][sc]) {
int col = star_col + sc;
int chip = col / 8; int bit = 7 - (col % 8);
fb[row][chip] |= (uint8_t)(1 << bit);
}
}
}
refresh_for(120);
/* Frame 3 — full star, text still hidden */
render_logo(star_col, text_col, star_col); /* mask hides everything left of star */
refresh_for(150);
/* ── Phase 2: Glint pulse ── */
memset(fb, 0, sizeof(fb));
refresh_for(80);
render_logo(star_col, text_col, star_col);
refresh_for(80);
memset(fb, 0, sizeof(fb));
refresh_for(60);
render_logo(star_col, text_col, star_col);
refresh_for(100);
/* ── Phase 3: Wipe right-to-left — reveal ARRIVE sweeping from star leftward ── */
for (int mask = star_col; mask >= text_col - 1; mask -= 2) {
render_logo(star_col, text_col, mask);
refresh_for(18);
}
render_logo(star_col, text_col, -1);
refresh_for(18);
/* ── Phase 4: Hold ── */
refresh_for(2000);
/* ── Phase 5: Fade out — rows extinguish top+bottom inward ── */
/* Order: 0,6 then 1,5 then 2,4 then 3 */
uint8_t row_mask = 0x7F; /* all 7 rows on */
row_mask &= ~(1 << 0); row_mask &= ~(1 << 6);
render_logo_rows(star_col, text_col, row_mask); refresh_for(80);
row_mask &= ~(1 << 1); row_mask &= ~(1 << 5);
render_logo_rows(star_col, text_col, row_mask); refresh_for(80);
row_mask &= ~(1 << 2); row_mask &= ~(1 << 4);
render_logo_rows(star_col, text_col, row_mask); refresh_for(80);
row_mask &= ~(1 << 3);
memset(fb, 0, sizeof(fb)); refresh_for(80);
/* Brief blank before scroll */
refresh_for(200);
}
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
{
if (huart->Instance == USART2) {
char b = (char)uart_rx_byte;
if (b == '\n' || b == '\r') {
if (uart_idx > 0) {
uart_buf[uart_idx] = '\0';
memcpy(message, uart_buf, uart_idx + 1);
uart_idx = 0;
new_message = 1;
}
} else if (uart_idx < UART_BUF - 1) {
uart_buf[uart_idx++] = b;
}
/* Re-arm for next byte */
HAL_UART_Receive_IT(&huart2, &uart_rx_byte, 1);
}
}
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
MX_GPIO_Init();
MX_SPI1_Init();
MX_USART2_UART_Init();
/* USER CODE BEGIN 2 */
/* Enable DWT cycle counter for microsecond delays */
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
DWT->CYCCNT = 0;
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
/* All rows off, blank display */
all_rows_off();
memset(fb, 0, sizeof(fb));
/* Start UART receive interrupt */
HAL_UART_Receive_IT(&huart2, &uart_rx_byte, 1);
/* Render default message */
render_message(message);
update_fb_from_scroll();
/* USER CODE END 2 */
/* USER CODE BEGIN WHILE */
/* Run boot animation */
arrive_animation();
update_fb_from_scroll();
uint32_t last_scroll = HAL_GetTick();
const uint32_t scroll_ms = 40;
while (1)
{
if (new_message) {
new_message = 0;
render_message(message);
}
if ((HAL_GetTick() - last_scroll) >= scroll_ms) {
last_scroll = HAL_GetTick();
scroll_x++;
if (scroll_x >= wide_cols) {
/* End of message — switch to next */
scroll_x = 0;
}
update_fb_from_scroll();
}
display_refresh();
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
RCC_OscInitStruct.PLL.PLLN = 85;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
{
Error_Handler();
}
}
/**
* @brief SPI1 Initialization Function
*/
static void MX_SPI1_Init(void)
{
/* USER CODE BEGIN SPI1_Init 0 */
/* USER CODE END SPI1_Init 0 */
/* USER CODE BEGIN SPI1_Init 1 */
/* USER CODE END SPI1_Init 1 */
hspi1.Instance = SPI1;
hspi1.Init.Mode = SPI_MODE_MASTER;
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
hspi1.Init.NSS = SPI_NSS_HARD_OUTPUT;
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
hspi1.Init.CRCPolynomial = 7;
hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
if (HAL_SPI_Init(&hspi1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN SPI1_Init 2 */
/* USER CODE END SPI1_Init 2 */
}
/**
* @brief USART2 Initialization Function
*/
static void MX_USART2_UART_Init(void)
{
/* USER CODE BEGIN USART2_Init 0 */
/* USER CODE END USART2_Init 0 */
/* USER CODE BEGIN USART2_Init 1 */
/* USER CODE END USART2_Init 1 */
huart2.Instance = USART2;
huart2.Init.BaudRate = 115200;
huart2.Init.WordLength = UART_WORDLENGTH_8B;
huart2.Init.StopBits = UART_STOPBITS_1;
huart2.Init.Parity = UART_PARITY_NONE;
huart2.Init.Mode = UART_MODE_TX_RX;
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
if (HAL_UART_Init(&huart2) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART2_Init 2 */
/* USER CODE END USART2_Init 2 */
}
/**
* @brief GPIO Initialization Function
*/
static void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
HAL_GPIO_WritePin(GPIOA, ROW_1_Pin|ROW_2_Pin|ROW_6_Pin|ROW_5_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(GPIOB, ROW_0_Pin|ROW_3_Pin|ROW_4_Pin|LED_Pin, GPIO_PIN_SET);
GPIO_InitStruct.Pin = ROW_1_Pin|ROW_2_Pin|ROW_6_Pin|ROW_5_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = ROW_0_Pin|ROW_3_Pin|ROW_4_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LED_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(LED_GPIO_Port, &GPIO_InitStruct);
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
/* USER CODE BEGIN 4 */
/* USER CODE END 4 */
/**
* @brief This function is executed in case of error occurrence.
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32g4xx_hal_msp.c
* @brief This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */
/* USER CODE END Define */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN Macro */
/* USER CODE END Macro */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* External functions --------------------------------------------------------*/
/* USER CODE BEGIN ExternalFunctions */
/* USER CODE END ExternalFunctions */
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
__HAL_RCC_PWR_CLK_ENABLE();
/* System interrupt init*/
/** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
*/
HAL_PWREx_DisableUCPDDeadBattery();
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
/**
* @brief SPI MSP Initialization
* This function configures the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hspi->Instance==SPI1)
{
/* USER CODE BEGIN SPI1_MspInit 0 */
/* USER CODE END SPI1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SPI1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**SPI1 GPIO Configuration
PA4 ------> SPI1_NSS
PA5 ------> SPI1_SCK
PA7 ------> SPI1_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN SPI1_MspInit 1 */
/* USER CODE END SPI1_MspInit 1 */
}
}
/**
* @brief SPI MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
{
if(hspi->Instance==SPI1)
{
/* USER CODE BEGIN SPI1_MspDeInit 0 */
/* USER CODE END SPI1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_SPI1_CLK_DISABLE();
/**SPI1 GPIO Configuration
PA4 ------> SPI1_NSS
PA5 ------> SPI1_SCK
PA7 ------> SPI1_MOSI
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_7);
/* USER CODE BEGIN SPI1_MspDeInit 1 */
/* USER CODE END SPI1_MspDeInit 1 */
}
}
/**
* @brief UART MSP Initialization
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(huart->Instance==USART2)
{
/* USER CODE BEGIN USART2_MspInit 0 */
/* USER CODE END USART2_MspInit 0 */
/** Initializes the peripherals clocks
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2;
PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
/* Peripheral clock enable */
__HAL_RCC_USART2_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
GPIO_InitStruct.Pin = USART2_TX_Pin|USART2_RX_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USART2 interrupt Init */
HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART2_IRQn);
/* USER CODE BEGIN USART2_MspInit 1 */
/* USER CODE END USART2_MspInit 1 */
}
}
/**
* @brief UART MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
{
if(huart->Instance==USART2)
{
/* USER CODE BEGIN USART2_MspDeInit 0 */
/* USER CODE END USART2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART2_CLK_DISABLE();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
HAL_GPIO_DeInit(GPIOA, USART2_TX_Pin|USART2_RX_Pin);
/* USART2 interrupt DeInit */
HAL_NVIC_DisableIRQ(USART2_IRQn);
/* USER CODE BEGIN USART2_MspDeInit 1 */
/* USER CODE END USART2_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32g4xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32g4xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern UART_HandleTypeDef huart2;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M4 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32G4xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32g4xx.s). */
/******************************************************************************/
/**
* @brief This function handles USART2 global interrupt / USART2 wake-up interrupt through EXTI line 26.
*/
void USART2_IRQHandler(void)
{
/* USER CODE BEGIN USART2_IRQn 0 */
/* USER CODE END USART2_IRQn 0 */
HAL_UART_IRQHandler(&huart2);
/* USER CODE BEGIN USART2_IRQn 1 */
/* USER CODE END USART2_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

176
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/**
******************************************************************************
* @file syscalls.c
* @author Auto-generated by STM32CubeIDE
* @brief STM32CubeIDE Minimal System calls file
*
* For more information about which c-functions
* need which of these lowlevel functions
* please consult the Newlib libc-manual
******************************************************************************
* @attention
*
* Copyright (c) 2020-2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes */
#include <sys/stat.h>
#include <stdlib.h>
#include <errno.h>
#include <stdio.h>
#include <signal.h>
#include <time.h>
#include <sys/time.h>
#include <sys/times.h>
/* Variables */
extern int __io_putchar(int ch) __attribute__((weak));
extern int __io_getchar(void) __attribute__((weak));
char *__env[1] = { 0 };
char **environ = __env;
/* Functions */
void initialise_monitor_handles()
{
}
int _getpid(void)
{
return 1;
}
int _kill(int pid, int sig)
{
(void)pid;
(void)sig;
errno = EINVAL;
return -1;
}
void _exit (int status)
{
_kill(status, -1);
while (1) {} /* Make sure we hang here */
}
__attribute__((weak)) int _read(int file, char *ptr, int len)
{
(void)file;
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
*ptr++ = __io_getchar();
}
return len;
}
__attribute__((weak)) int _write(int file, char *ptr, int len)
{
(void)file;
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
__io_putchar(*ptr++);
}
return len;
}
int _close(int file)
{
(void)file;
return -1;
}
int _fstat(int file, struct stat *st)
{
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
int _isatty(int file)
{
(void)file;
return 1;
}
int _lseek(int file, int ptr, int dir)
{
(void)file;
(void)ptr;
(void)dir;
return 0;
}
int _open(char *path, int flags, ...)
{
(void)path;
(void)flags;
/* Pretend like we always fail */
return -1;
}
int _wait(int *status)
{
(void)status;
errno = ECHILD;
return -1;
}
int _unlink(char *name)
{
(void)name;
errno = ENOENT;
return -1;
}
int _times(struct tms *buf)
{
(void)buf;
return -1;
}
int _stat(char *file, struct stat *st)
{
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
int _link(char *old, char *new)
{
(void)old;
(void)new;
errno = EMLINK;
return -1;
}
int _fork(void)
{
errno = EAGAIN;
return -1;
}
int _execve(char *name, char **argv, char **env)
{
(void)name;
(void)argv;
(void)env;
errno = ENOMEM;
return -1;
}

79
Core/Src/sysmem.c Normal file
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/**
******************************************************************************
* @file sysmem.c
* @author Generated by STM32CubeIDE
* @brief STM32CubeIDE System Memory calls file
*
* For more information about which C functions
* need which of these lowlevel functions
* please consult the newlib libc manual
******************************************************************************
* @attention
*
* Copyright (c) 2026 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes */
#include <errno.h>
#include <stdint.h>
/**
* Pointer to the current high watermark of the heap usage
*/
static uint8_t *__sbrk_heap_end = NULL;
/**
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
* and others from the C library
*
* @verbatim
* ############################################################################
* # .data # .bss # newlib heap # MSP stack #
* # # # # Reserved by _Min_Stack_Size #
* ############################################################################
* ^-- RAM start ^-- _end _estack, RAM end --^
* @endverbatim
*
* This implementation starts allocating at the '_end' linker symbol
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
* The implementation considers '_estack' linker symbol to be RAM end
* NOTE: If the MSP stack, at any point during execution, grows larger than the
* reserved size, please increase the '_Min_Stack_Size'.
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
const uint8_t *max_heap = (uint8_t *)stack_limit;
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
{
__sbrk_heap_end = &_end;
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
{
errno = ENOMEM;
return (void *)-1;
}
prev_heap_end = __sbrk_heap_end;
__sbrk_heap_end += incr;
return (void *)prev_heap_end;
}

287
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/**
******************************************************************************
* @file system_stm32g4xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
*
* This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32g4xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* After each device reset the HSI (16 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
* configure the system clock before to branch to main program.
*
* This file configures the system clock as follows:
*=============================================================================
*-----------------------------------------------------------------------------
* System Clock source | HSI
*-----------------------------------------------------------------------------
* SYSCLK(Hz) | 16000000
*-----------------------------------------------------------------------------
* HCLK(Hz) | 16000000
*-----------------------------------------------------------------------------
* AHB Prescaler | 1
*-----------------------------------------------------------------------------
* APB1 Prescaler | 1
*-----------------------------------------------------------------------------
* APB2 Prescaler | 1
*-----------------------------------------------------------------------------
* PLL_M | 1
*-----------------------------------------------------------------------------
* PLL_N | 16
*-----------------------------------------------------------------------------
* PLL_P | 7
*-----------------------------------------------------------------------------
* PLL_Q | 2
*-----------------------------------------------------------------------------
* PLL_R | 2
*-----------------------------------------------------------------------------
* Require 48MHz for RNG | Disabled
*-----------------------------------------------------------------------------
*=============================================================================
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32g4xx_system
* @{
*/
/** @addtogroup STM32G4xx_System_Private_Includes
* @{
*/
#include "stm32g4xx.h"
#if !defined (HSE_VALUE)
#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @}
*/
/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32G4xx_System_Private_Defines
* @{
*/
/************************* Miscellaneous Configuration ************************/
/* Note: Following vector table addresses must be defined in line with linker
configuration. */
/*!< Uncomment the following line if you need to relocate the vector table
anywhere in Flash or Sram, else the vector table is kept at the automatic
remap of boot address selected */
/* #define USER_VECT_TAB_ADDRESS */
#if defined(USER_VECT_TAB_ADDRESS)
/*!< Uncomment the following line if you need to relocate your vector Table
in Sram else user remap will be done in Flash. */
/* #define VECT_TAB_SRAM */
#if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#else
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#endif /* VECT_TAB_SRAM */
#if !defined(VECT_TAB_OFFSET)
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table offset field.
This value must be a multiple of 0x200. */
#endif /* VECT_TAB_OFFSET */
#endif /* USER_VECT_TAB_ADDRESS */
/******************************************************************************/
/**
* @}
*/
/** @addtogroup STM32G4xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32G4xx_System_Private_Variables
* @{
*/
/* The SystemCoreClock variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = HSI_VALUE;
const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
/**
* @}
*/
/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @addtogroup STM32G4xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system.
* @param None
* @retval None
*/
void SystemInit(void)
{
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
#endif
/* Configure the Vector Table location add offset address ------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
*
* (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
* 16 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
* 24 MHz), user has to ensure that HSE_VALUE is same as the real
* frequency of the crystal used. Otherwise, this function may
* have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
*
* @param None
* @retval None
*/
void SystemCoreClockUpdate(void)
{
uint32_t tmp, pllvco, pllr, pllsource, pllm;
/* Get SYSCLK source -------------------------------------------------------*/
switch (RCC->CFGR & RCC_CFGR_SWS)
{
case 0x04: /* HSI used as system clock source */
SystemCoreClock = HSI_VALUE;
break;
case 0x08: /* HSE used as system clock source */
SystemCoreClock = HSE_VALUE;
break;
case 0x0C: /* PLL used as system clock source */
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
SYSCLK = PLL_VCO / PLLR
*/
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
if (pllsource == 0x02UL) /* HSI used as PLL clock source */
{
pllvco = (HSI_VALUE / pllm);
}
else /* HSE used as PLL clock source */
{
pllvco = (HSE_VALUE / pllm);
}
pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
SystemCoreClock = pllvco/pllr;
break;
default:
break;
}
/* Compute HCLK clock frequency --------------------------------------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/

498
Core/Startup/startup_stm32g431kbtx.s Normal file
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/**
******************************************************************************
* @file startup_stm32g431xx.s
* @author MCD Application Team
* @brief STM32G431xx devices vector table GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address,
* - Configure the clock system
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M4 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m4
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
.equ BootRAM, 0xF1E0F85F
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr r0, =_estack
mov sp, r0 /* set stack pointer */
/* Call the clock system initialization function.*/
bl SystemInit
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
ldr r2, =_sidata
movs r3, #0
b LoopCopyDataInit
CopyDataInit:
ldr r4, [r2, r3]
str r4, [r0, r3]
adds r3, r3, #4
LoopCopyDataInit:
adds r4, r0, r3
cmp r4, r1
bcc CopyDataInit
/* Zero fill the bss segment. */
ldr r2, =_sbss
ldr r4, =_ebss
movs r3, #0
b LoopFillZerobss
FillZerobss:
str r3, [r2]
adds r2, r2, #4
LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex-M4. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word PendSV_Handler
.word SysTick_Handler
.word WWDG_IRQHandler
.word PVD_PVM_IRQHandler
.word RTC_TAMP_LSECSS_IRQHandler
.word RTC_WKUP_IRQHandler
.word FLASH_IRQHandler
.word RCC_IRQHandler
.word EXTI0_IRQHandler
.word EXTI1_IRQHandler
.word EXTI2_IRQHandler
.word EXTI3_IRQHandler
.word EXTI4_IRQHandler
.word DMA1_Channel1_IRQHandler
.word DMA1_Channel2_IRQHandler
.word DMA1_Channel3_IRQHandler
.word DMA1_Channel4_IRQHandler
.word DMA1_Channel5_IRQHandler
.word DMA1_Channel6_IRQHandler
.word 0
.word ADC1_2_IRQHandler
.word USB_HP_IRQHandler
.word USB_LP_IRQHandler
.word FDCAN1_IT0_IRQHandler
.word FDCAN1_IT1_IRQHandler
.word EXTI9_5_IRQHandler
.word TIM1_BRK_TIM15_IRQHandler
.word TIM1_UP_TIM16_IRQHandler
.word TIM1_TRG_COM_TIM17_IRQHandler
.word TIM1_CC_IRQHandler
.word TIM2_IRQHandler
.word TIM3_IRQHandler
.word TIM4_IRQHandler
.word I2C1_EV_IRQHandler
.word I2C1_ER_IRQHandler
.word I2C2_EV_IRQHandler
.word I2C2_ER_IRQHandler
.word SPI1_IRQHandler
.word SPI2_IRQHandler
.word USART1_IRQHandler
.word USART2_IRQHandler
.word USART3_IRQHandler
.word EXTI15_10_IRQHandler
.word RTC_Alarm_IRQHandler
.word USBWakeUp_IRQHandler
.word TIM8_BRK_IRQHandler
.word TIM8_UP_IRQHandler
.word TIM8_TRG_COM_IRQHandler
.word TIM8_CC_IRQHandler
.word 0
.word 0
.word LPTIM1_IRQHandler
.word 0
.word SPI3_IRQHandler
.word UART4_IRQHandler
.word 0
.word TIM6_DAC_IRQHandler
.word TIM7_IRQHandler
.word DMA2_Channel1_IRQHandler
.word DMA2_Channel2_IRQHandler
.word DMA2_Channel3_IRQHandler
.word DMA2_Channel4_IRQHandler
.word DMA2_Channel5_IRQHandler
.word 0
.word 0
.word UCPD1_IRQHandler
.word COMP1_2_3_IRQHandler
.word COMP4_IRQHandler
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word CRS_IRQHandler
.word SAI1_IRQHandler
.word 0
.word 0
.word 0
.word 0
.word FPU_IRQHandler
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word RNG_IRQHandler
.word LPUART1_IRQHandler
.word I2C3_EV_IRQHandler
.word I2C3_ER_IRQHandler
.word DMAMUX_OVR_IRQHandler
.word 0
.word 0
.word DMA2_Channel6_IRQHandler
.word 0
.word 0
.word CORDIC_IRQHandler
.word FMAC_IRQHandler
.size g_pfnVectors, .-g_pfnVectors
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_PVM_IRQHandler
.thumb_set PVD_PVM_IRQHandler,Default_Handler
.weak RTC_TAMP_LSECSS_IRQHandler
.thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
.weak RTC_WKUP_IRQHandler
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_IRQHandler
.thumb_set EXTI0_IRQHandler,Default_Handler
.weak EXTI1_IRQHandler
.thumb_set EXTI1_IRQHandler,Default_Handler
.weak EXTI2_IRQHandler
.thumb_set EXTI2_IRQHandler,Default_Handler
.weak EXTI3_IRQHandler
.thumb_set EXTI3_IRQHandler,Default_Handler
.weak EXTI4_IRQHandler
.thumb_set EXTI4_IRQHandler,Default_Handler
.weak DMA1_Channel1_IRQHandler
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
.weak DMA1_Channel2_IRQHandler
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
.weak DMA1_Channel3_IRQHandler
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
.weak DMA1_Channel4_IRQHandler
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
.weak DMA1_Channel5_IRQHandler
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
.weak DMA1_Channel6_IRQHandler
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
.weak ADC1_2_IRQHandler
.thumb_set ADC1_2_IRQHandler,Default_Handler
.weak USB_HP_IRQHandler
.thumb_set USB_HP_IRQHandler,Default_Handler
.weak USB_LP_IRQHandler
.thumb_set USB_LP_IRQHandler,Default_Handler
.weak FDCAN1_IT0_IRQHandler
.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
.weak FDCAN1_IT1_IRQHandler
.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
.weak EXTI9_5_IRQHandler
.thumb_set EXTI9_5_IRQHandler,Default_Handler
.weak TIM1_BRK_TIM15_IRQHandler
.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
.weak TIM1_UP_TIM16_IRQHandler
.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
.weak TIM1_TRG_COM_TIM17_IRQHandler
.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
.weak TIM1_CC_IRQHandler
.thumb_set TIM1_CC_IRQHandler,Default_Handler
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM4_IRQHandler
.thumb_set TIM4_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_IRQHandler
.thumb_set USART3_IRQHandler,Default_Handler
.weak EXTI15_10_IRQHandler
.thumb_set EXTI15_10_IRQHandler,Default_Handler
.weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
.weak USBWakeUp_IRQHandler
.thumb_set USBWakeUp_IRQHandler,Default_Handler
.weak TIM8_BRK_IRQHandler
.thumb_set TIM8_BRK_IRQHandler,Default_Handler
.weak TIM8_UP_IRQHandler
.thumb_set TIM8_UP_IRQHandler,Default_Handler
.weak TIM8_TRG_COM_IRQHandler
.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
.weak TIM8_CC_IRQHandler
.thumb_set TIM8_CC_IRQHandler,Default_Handler
.weak LPTIM1_IRQHandler
.thumb_set LPTIM1_IRQHandler,Default_Handler
.weak SPI3_IRQHandler
.thumb_set SPI3_IRQHandler,Default_Handler
.weak UART4_IRQHandler
.thumb_set UART4_IRQHandler,Default_Handler
.weak TIM6_DAC_IRQHandler
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
.weak TIM7_IRQHandler
.thumb_set TIM7_IRQHandler,Default_Handler
.weak DMA2_Channel1_IRQHandler
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
.weak DMA2_Channel2_IRQHandler
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
.weak DMA2_Channel3_IRQHandler
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
.weak DMA2_Channel4_IRQHandler
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
.weak DMA2_Channel5_IRQHandler
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
.weak UCPD1_IRQHandler
.thumb_set UCPD1_IRQHandler,Default_Handler
.weak COMP1_2_3_IRQHandler
.thumb_set COMP1_2_3_IRQHandler,Default_Handler
.weak COMP4_IRQHandler
.thumb_set COMP4_IRQHandler,Default_Handler
.weak CRS_IRQHandler
.thumb_set CRS_IRQHandler,Default_Handler
.weak SAI1_IRQHandler
.thumb_set SAI1_IRQHandler,Default_Handler
.weak FPU_IRQHandler
.thumb_set FPU_IRQHandler,Default_Handler
.weak RNG_IRQHandler
.thumb_set RNG_IRQHandler,Default_Handler
.weak LPUART1_IRQHandler
.thumb_set LPUART1_IRQHandler,Default_Handler
.weak I2C3_EV_IRQHandler
.thumb_set I2C3_EV_IRQHandler,Default_Handler
.weak I2C3_ER_IRQHandler
.thumb_set I2C3_ER_IRQHandler,Default_Handler
.weak DMAMUX_OVR_IRQHandler
.thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
.weak DMA2_Channel6_IRQHandler
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
.weak CORDIC_IRQHandler
.thumb_set CORDIC_IRQHandler,Default_Handler
.weak FMAC_IRQHandler
.thumb_set FMAC_IRQHandler,Default_Handler

16
Debug/Core/Src/main.cyclo Normal file
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@@ -0,0 +1,16 @@
../Core/Src/main.c:163:13:delay_us 2
../Core/Src/main.c:171:13:all_rows_off 2
../Core/Src/main.c:178:13:display_refresh 2
../Core/Src/main.c:191:13:render_message 10
../Core/Src/main.c:215:13:update_fb_from_scroll 6
../Core/Src/main.c:256:13:render_logo 17
../Core/Src/main.c:290:13:render_logo_rows 13
../Core/Src/main.c:313:13:refresh_for 2
../Core/Src/main.c:320:13:arrive_animation 10
../Core/Src/main.c:402:6:HAL_UART_RxCpltCallback 6
../Core/Src/main.c:427:5:main 4
../Core/Src/main.c:511:6:SystemClock_Config 3
../Core/Src/main.c:549:13:MX_SPI1_Init 2
../Core/Src/main.c:584:13:MX_USART2_UART_Init 5
../Core/Src/main.c:628:13:MX_GPIO_Init 1
../Core/Src/main.c:671:6:Error_Handler 1

60
Debug/Core/Src/main.d Normal file
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@@ -0,0 +1,60 @@
Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \
../Core/Inc/stm32g4xx_hal_conf.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h
../Core/Inc/main.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h:
../Core/Inc/stm32g4xx_hal_conf.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h:
../Drivers/CMSIS/Include/core_cm4.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h:

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16
Debug/Core/Src/main.su Normal file
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@@ -0,0 +1,16 @@
../Core/Src/main.c:163:13:delay_us 24 static
../Core/Src/main.c:171:13:all_rows_off 16 static
../Core/Src/main.c:178:13:display_refresh 16 static
../Core/Src/main.c:191:13:render_message 32 static
../Core/Src/main.c:215:13:update_fb_from_scroll 32 static
../Core/Src/main.c:256:13:render_logo 64 static
../Core/Src/main.c:290:13:render_logo_rows 64 static
../Core/Src/main.c:313:13:refresh_for 24 static
../Core/Src/main.c:320:13:arrive_animation 80 static
../Core/Src/main.c:402:6:HAL_UART_RxCpltCallback 24 static
../Core/Src/main.c:427:5:main 16 static
../Core/Src/main.c:511:6:SystemClock_Config 88 static
../Core/Src/main.c:549:13:MX_SPI1_Init 8 static
../Core/Src/main.c:584:13:MX_USART2_UART_Init 8 static
../Core/Src/main.c:628:13:MX_GPIO_Init 40 static
../Core/Src/main.c:671:6:Error_Handler 4 static,ignoring_inline_asm

5
Debug/Core/Src/stm32g4xx_hal_msp.cyclo Normal file
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@@ -0,0 +1,5 @@
../Core/Src/stm32g4xx_hal_msp.c:62:6:HAL_MspInit 1
../Core/Src/stm32g4xx_hal_msp.c:89:6:HAL_SPI_MspInit 2
../Core/Src/stm32g4xx_hal_msp.c:127:6:HAL_SPI_MspDeInit 2
../Core/Src/stm32g4xx_hal_msp.c:157:6:HAL_UART_MspInit 3
../Core/Src/stm32g4xx_hal_msp.c:208:6:HAL_UART_MspDeInit 2

60
Debug/Core/Src/stm32g4xx_hal_msp.d Normal file
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@@ -0,0 +1,60 @@
Core/Src/stm32g4xx_hal_msp.o: ../Core/Src/stm32g4xx_hal_msp.c \
../Core/Inc/main.h ../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \
../Core/Inc/stm32g4xx_hal_conf.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h
../Core/Inc/main.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h:
../Core/Inc/stm32g4xx_hal_conf.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h:
../Drivers/CMSIS/Include/core_cm4.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h:

BIN
Debug/Core/Src/stm32g4xx_hal_msp.o Normal file
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5
Debug/Core/Src/stm32g4xx_hal_msp.su Normal file
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@@ -0,0 +1,5 @@
../Core/Src/stm32g4xx_hal_msp.c:62:6:HAL_MspInit 16 static
../Core/Src/stm32g4xx_hal_msp.c:89:6:HAL_SPI_MspInit 48 static
../Core/Src/stm32g4xx_hal_msp.c:127:6:HAL_SPI_MspDeInit 16 static
../Core/Src/stm32g4xx_hal_msp.c:157:6:HAL_UART_MspInit 112 static
../Core/Src/stm32g4xx_hal_msp.c:208:6:HAL_UART_MspDeInit 16 static

10
Debug/Core/Src/stm32g4xx_it.cyclo Normal file
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@@ -0,0 +1,10 @@
../Core/Src/stm32g4xx_it.c:69:6:NMI_Handler 1
../Core/Src/stm32g4xx_it.c:84:6:HardFault_Handler 1
../Core/Src/stm32g4xx_it.c:99:6:MemManage_Handler 1
../Core/Src/stm32g4xx_it.c:114:6:BusFault_Handler 1
../Core/Src/stm32g4xx_it.c:129:6:UsageFault_Handler 1
../Core/Src/stm32g4xx_it.c:144:6:SVC_Handler 1
../Core/Src/stm32g4xx_it.c:157:6:DebugMon_Handler 1
../Core/Src/stm32g4xx_it.c:170:6:PendSV_Handler 1
../Core/Src/stm32g4xx_it.c:183:6:SysTick_Handler 1
../Core/Src/stm32g4xx_it.c:204:6:USART2_IRQHandler 1

62
Debug/Core/Src/stm32g4xx_it.d Normal file
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@@ -0,0 +1,62 @@
Core/Src/stm32g4xx_it.o: ../Core/Src/stm32g4xx_it.c ../Core/Inc/main.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \
../Core/Inc/stm32g4xx_hal_conf.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h \
../Core/Inc/stm32g4xx_it.h
../Core/Inc/main.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h:
../Core/Inc/stm32g4xx_hal_conf.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h:
../Drivers/CMSIS/Include/core_cm4.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h:
../Core/Inc/stm32g4xx_it.h:

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10
Debug/Core/Src/stm32g4xx_it.su Normal file
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@@ -0,0 +1,10 @@
../Core/Src/stm32g4xx_it.c:69:6:NMI_Handler 4 static
../Core/Src/stm32g4xx_it.c:84:6:HardFault_Handler 4 static
../Core/Src/stm32g4xx_it.c:99:6:MemManage_Handler 4 static
../Core/Src/stm32g4xx_it.c:114:6:BusFault_Handler 4 static
../Core/Src/stm32g4xx_it.c:129:6:UsageFault_Handler 4 static
../Core/Src/stm32g4xx_it.c:144:6:SVC_Handler 4 static
../Core/Src/stm32g4xx_it.c:157:6:DebugMon_Handler 4 static
../Core/Src/stm32g4xx_it.c:170:6:PendSV_Handler 4 static
../Core/Src/stm32g4xx_it.c:183:6:SysTick_Handler 8 static
../Core/Src/stm32g4xx_it.c:204:6:USART2_IRQHandler 8 static

42
Debug/Core/Src/subdir.mk Normal file
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@@ -0,0 +1,42 @@
################################################################################
# Automatically-generated file. Do not edit!
# Toolchain: GNU Tools for STM32 (14.3.rel1)
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../Core/Src/main.c \
../Core/Src/stm32g4xx_hal_msp.c \
../Core/Src/stm32g4xx_it.c \
../Core/Src/syscalls.c \
../Core/Src/sysmem.c \
../Core/Src/system_stm32g4xx.c
OBJS += \
./Core/Src/main.o \
./Core/Src/stm32g4xx_hal_msp.o \
./Core/Src/stm32g4xx_it.o \
./Core/Src/syscalls.o \
./Core/Src/sysmem.o \
./Core/Src/system_stm32g4xx.o
C_DEPS += \
./Core/Src/main.d \
./Core/Src/stm32g4xx_hal_msp.d \
./Core/Src/stm32g4xx_it.d \
./Core/Src/syscalls.d \
./Core/Src/sysmem.d \
./Core/Src/system_stm32g4xx.d
# Each subdirectory must supply rules for building sources it contributes
Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32G431xx -c -I../Core/Inc -I../Drivers/STM32G4xx_HAL_Driver/Inc -I../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32G4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
clean: clean-Core-2f-Src
clean-Core-2f-Src:
-$(RM) ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/stm32g4xx_hal_msp.cyclo ./Core/Src/stm32g4xx_hal_msp.d ./Core/Src/stm32g4xx_hal_msp.o ./Core/Src/stm32g4xx_hal_msp.su ./Core/Src/stm32g4xx_it.cyclo ./Core/Src/stm32g4xx_it.d ./Core/Src/stm32g4xx_it.o ./Core/Src/stm32g4xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32g4xx.cyclo ./Core/Src/system_stm32g4xx.d ./Core/Src/system_stm32g4xx.o ./Core/Src/system_stm32g4xx.su
.PHONY: clean-Core-2f-Src

18
Debug/Core/Src/syscalls.cyclo Normal file
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@@ -0,0 +1,18 @@
../Core/Src/syscalls.c:44:6:initialise_monitor_handles 1
../Core/Src/syscalls.c:48:5:_getpid 1
../Core/Src/syscalls.c:53:5:_kill 1
../Core/Src/syscalls.c:61:6:_exit 1
../Core/Src/syscalls.c:67:27:_read 2
../Core/Src/syscalls.c:80:27:_write 2
../Core/Src/syscalls.c:92:5:_close 1
../Core/Src/syscalls.c:99:5:_fstat 1
../Core/Src/syscalls.c:106:5:_isatty 1
../Core/Src/syscalls.c:112:5:_lseek 1
../Core/Src/syscalls.c:120:5:_open 1
../Core/Src/syscalls.c:128:5:_wait 1
../Core/Src/syscalls.c:135:5:_unlink 1
../Core/Src/syscalls.c:142:5:_times 1
../Core/Src/syscalls.c:148:5:_stat 1
../Core/Src/syscalls.c:155:5:_link 1
../Core/Src/syscalls.c:163:5:_fork 1
../Core/Src/syscalls.c:169:5:_execve 1

1
Debug/Core/Src/syscalls.d Normal file
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@@ -0,0 +1 @@
Core/Src/syscalls.o: ../Core/Src/syscalls.c

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18
Debug/Core/Src/syscalls.su Normal file
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@@ -0,0 +1,18 @@
../Core/Src/syscalls.c:44:6:initialise_monitor_handles 4 static
../Core/Src/syscalls.c:48:5:_getpid 4 static
../Core/Src/syscalls.c:53:5:_kill 16 static
../Core/Src/syscalls.c:61:6:_exit 16 static
../Core/Src/syscalls.c:67:27:_read 32 static
../Core/Src/syscalls.c:80:27:_write 32 static
../Core/Src/syscalls.c:92:5:_close 16 static
../Core/Src/syscalls.c:99:5:_fstat 16 static
../Core/Src/syscalls.c:106:5:_isatty 16 static
../Core/Src/syscalls.c:112:5:_lseek 24 static
../Core/Src/syscalls.c:120:5:_open 12 static
../Core/Src/syscalls.c:128:5:_wait 16 static
../Core/Src/syscalls.c:135:5:_unlink 16 static
../Core/Src/syscalls.c:142:5:_times 16 static
../Core/Src/syscalls.c:148:5:_stat 16 static
../Core/Src/syscalls.c:155:5:_link 16 static
../Core/Src/syscalls.c:163:5:_fork 8 static
../Core/Src/syscalls.c:169:5:_execve 24 static

1
Debug/Core/Src/sysmem.cyclo Normal file
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@@ -0,0 +1 @@
../Core/Src/sysmem.c:53:7:_sbrk 3

1
Debug/Core/Src/sysmem.d Normal file
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@@ -0,0 +1 @@
Core/Src/sysmem.o: ../Core/Src/sysmem.c

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1
Debug/Core/Src/sysmem.su Normal file
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@@ -0,0 +1 @@
../Core/Src/sysmem.c:53:7:_sbrk 32 static

2
Debug/Core/Src/system_stm32g4xx.cyclo Normal file
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@@ -0,0 +1,2 @@
../Core/Src/system_stm32g4xx.c:181:6:SystemInit 1
../Core/Src/system_stm32g4xx.c:230:6:SystemCoreClockUpdate 6

59
Debug/Core/Src/system_stm32g4xx.d Normal file
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@@ -0,0 +1,59 @@
Core/Src/system_stm32g4xx.o: ../Core/Src/system_stm32g4xx.c \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \
../Core/Inc/stm32g4xx_hal_conf.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h:
../Drivers/CMSIS/Include/core_cm4.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h:
../Core/Inc/stm32g4xx_hal_conf.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h:

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2
Debug/Core/Src/system_stm32g4xx.su Normal file
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@@ -0,0 +1,2 @@
../Core/Src/system_stm32g4xx.c:181:6:SystemInit 4 static
../Core/Src/system_stm32g4xx.c:230:6:SystemCoreClockUpdate 32 static

2
Debug/Core/Startup/startup_stm32g431kbtx.d Normal file
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@@ -0,0 +1,2 @@
Core/Startup/startup_stm32g431kbtx.o: \
../Core/Startup/startup_stm32g431kbtx.s

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27
Debug/Core/Startup/subdir.mk Normal file
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################################################################################
# Automatically-generated file. Do not edit!
# Toolchain: GNU Tools for STM32 (14.3.rel1)
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
S_SRCS += \
../Core/Startup/startup_stm32g431kbtx.s
OBJS += \
./Core/Startup/startup_stm32g431kbtx.o
S_DEPS += \
./Core/Startup/startup_stm32g431kbtx.d
# Each subdirectory must supply rules for building sources it contributes
Core/Startup/%.o: ../Core/Startup/%.s Core/Startup/subdir.mk
arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<"
clean: clean-Core-2f-Startup
clean-Core-2f-Startup:
-$(RM) ./Core/Startup/startup_stm32g431kbtx.d ./Core/Startup/startup_stm32g431kbtx.o
.PHONY: clean-Core-2f-Startup

38
Debug/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.cyclo Normal file
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../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:148:19:HAL_Init 2
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:192:19:HAL_DeInit 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:221:13:HAL_MspInit 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:232:13:HAL_MspDeInit 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:255:26:HAL_InitTick 4
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:322:13:HAL_IncTick 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:333:17:HAL_GetTick 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:342:10:HAL_GetTickPrio 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:351:19:HAL_SetTickFreq 3
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:384:10:HAL_GetTickFreq 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:400:13:HAL_Delay 3
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:426:13:HAL_SuspendTick 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:442:13:HAL_ResumeTick 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:452:10:HAL_GetHalVersion 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:461:10:HAL_GetREVID 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:470:10:HAL_GetDEVID 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:479:10:HAL_GetUIDw0 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:488:10:HAL_GetUIDw1 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:497:10:HAL_GetUIDw2 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:526:6:HAL_DBGMCU_EnableDBGSleepMode 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:535:6:HAL_DBGMCU_DisableDBGSleepMode 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:544:6:HAL_DBGMCU_EnableDBGStopMode 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:553:6:HAL_DBGMCU_DisableDBGStopMode 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:562:6:HAL_DBGMCU_EnableDBGStandbyMode 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:571:6:HAL_DBGMCU_DisableDBGStandbyMode 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:603:6:HAL_SYSCFG_CCMSRAMErase 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:622:6:HAL_SYSCFG_EnableMemorySwappingBank 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:637:6:HAL_SYSCFG_DisableMemorySwappingBank 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:655:6:HAL_SYSCFG_VREFBUF_VoltageScalingConfig 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:671:6:HAL_SYSCFG_VREFBUF_HighImpedanceConfig 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:685:6:HAL_SYSCFG_VREFBUF_TrimmingConfig 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:697:19:HAL_SYSCFG_EnableVREFBUF 3
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:723:6:HAL_SYSCFG_DisableVREFBUF 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:734:6:HAL_SYSCFG_EnableIOSwitchBooster 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:744:6:HAL_SYSCFG_DisableIOSwitchBooster 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:754:6:HAL_SYSCFG_EnableIOSwitchVDD 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:764:6:HAL_SYSCFG_DisableIOSwitchVDD 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:774:6:HAL_SYSCFG_CCMSRAM_WriteProtectionEnable 1

60
Debug/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.d Normal file
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@@ -0,0 +1,60 @@
Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.o: \
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \
../Core/Inc/stm32g4xx_hal_conf.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h:
../Core/Inc/stm32g4xx_hal_conf.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h:
../Drivers/CMSIS/Include/core_cm4.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h:

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Debug/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.su Normal file
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@@ -0,0 +1,38 @@
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:148:19:HAL_Init 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:192:19:HAL_DeInit 8 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:221:13:HAL_MspInit 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:232:13:HAL_MspDeInit 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:255:26:HAL_InitTick 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:322:13:HAL_IncTick 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:333:17:HAL_GetTick 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:342:10:HAL_GetTickPrio 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:351:19:HAL_SetTickFreq 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:384:10:HAL_GetTickFreq 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:400:13:HAL_Delay 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:426:13:HAL_SuspendTick 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:442:13:HAL_ResumeTick 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:452:10:HAL_GetHalVersion 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:461:10:HAL_GetREVID 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:470:10:HAL_GetDEVID 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:479:10:HAL_GetUIDw0 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:488:10:HAL_GetUIDw1 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:497:10:HAL_GetUIDw2 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:526:6:HAL_DBGMCU_EnableDBGSleepMode 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:535:6:HAL_DBGMCU_DisableDBGSleepMode 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:544:6:HAL_DBGMCU_EnableDBGStopMode 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:553:6:HAL_DBGMCU_DisableDBGStopMode 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:562:6:HAL_DBGMCU_EnableDBGStandbyMode 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:571:6:HAL_DBGMCU_DisableDBGStandbyMode 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:603:6:HAL_SYSCFG_CCMSRAMErase 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:622:6:HAL_SYSCFG_EnableMemorySwappingBank 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:637:6:HAL_SYSCFG_DisableMemorySwappingBank 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:655:6:HAL_SYSCFG_VREFBUF_VoltageScalingConfig 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:671:6:HAL_SYSCFG_VREFBUF_HighImpedanceConfig 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:685:6:HAL_SYSCFG_VREFBUF_TrimmingConfig 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:697:19:HAL_SYSCFG_EnableVREFBUF 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:723:6:HAL_SYSCFG_DisableVREFBUF 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:734:6:HAL_SYSCFG_EnableIOSwitchBooster 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:744:6:HAL_SYSCFG_DisableIOSwitchBooster 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:754:6:HAL_SYSCFG_EnableIOSwitchVDD 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:764:6:HAL_SYSCFG_DisableIOSwitchVDD 4 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c:774:6:HAL_SYSCFG_CCMSRAM_WriteProtectionEnable 16 static

34
Debug/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.cyclo Normal file
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../Drivers/CMSIS/Include/core_cm4.h:1648:22:__NVIC_SetPriorityGrouping 1
../Drivers/CMSIS/Include/core_cm4.h:1667:26:__NVIC_GetPriorityGrouping 1
../Drivers/CMSIS/Include/core_cm4.h:1679:22:__NVIC_EnableIRQ 2
../Drivers/CMSIS/Include/core_cm4.h:1717:22:__NVIC_DisableIRQ 2
../Drivers/CMSIS/Include/core_cm4.h:1736:26:__NVIC_GetPendingIRQ 2
../Drivers/CMSIS/Include/core_cm4.h:1755:22:__NVIC_SetPendingIRQ 2
../Drivers/CMSIS/Include/core_cm4.h:1770:22:__NVIC_ClearPendingIRQ 2
../Drivers/CMSIS/Include/core_cm4.h:1787:26:__NVIC_GetActive 2
../Drivers/CMSIS/Include/core_cm4.h:1809:22:__NVIC_SetPriority 2
../Drivers/CMSIS/Include/core_cm4.h:1831:26:__NVIC_GetPriority 2
../Drivers/CMSIS/Include/core_cm4.h:1856:26:NVIC_EncodePriority 2
../Drivers/CMSIS/Include/core_cm4.h:1883:22:NVIC_DecodePriority 2
../Drivers/CMSIS/Include/core_cm4.h:1933:34:__NVIC_SystemReset 1
../Drivers/CMSIS/Include/core_cm4.h:2017:26:SysTick_Config 2
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:163:6:HAL_NVIC_SetPriorityGrouping 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:185:6:HAL_NVIC_SetPriority 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:207:6:HAL_NVIC_EnableIRQ 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:223:6:HAL_NVIC_DisableIRQ 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:236:6:HAL_NVIC_SystemReset 0
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:249:10:HAL_SYSTICK_Config 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:277:10:HAL_NVIC_GetPriorityGrouping 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:304:6:HAL_NVIC_GetPriority 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:319:6:HAL_NVIC_SetPendingIRQ 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:337:10:HAL_NVIC_GetPendingIRQ 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:353:6:HAL_NVIC_ClearPendingIRQ 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:370:10:HAL_NVIC_GetActive 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:384:6:HAL_SYSTICK_CLKSourceConfig 2
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:402:6:HAL_SYSTICK_IRQHandler 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:411:13:HAL_SYSTICK_Callback 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:430:6:HAL_MPU_Enable 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:445:6:HAL_MPU_Disable 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:458:6:HAL_MPU_EnableRegion 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:474:6:HAL_MPU_DisableRegion 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c:492:6:HAL_MPU_ConfigRegion 1

60
Debug/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.d Normal file
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15
Debug/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.cyclo Normal file
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Debug/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.d Normal file
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Debug/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.su Normal file
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5
Debug/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.cyclo Normal file
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14
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2
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8
Debug/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.cyclo Normal file
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Debug/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.d Normal file
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16
Debug/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.cyclo Normal file
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60
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Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.o: \
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19
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../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:316:19:HAL_SPI_Init 8
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../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:535:13:HAL_SPI_MspInit 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:551:13:HAL_SPI_MspDeInit 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:823:19:HAL_SPI_Transmit 27
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:1012:19:HAL_SPI_Receive 23
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:1255:19:HAL_SPI_TransmitReceive 43
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:1603:19:HAL_SPI_Transmit_IT 8
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:1685:19:HAL_SPI_Receive_IT 10
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:1789:19:HAL_SPI_TransmitReceive_IT 14
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:1897:19:HAL_SPI_Transmit_DMA 11
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2018:19:HAL_SPI_Receive_DMA 13
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2158:19:HAL_SPI_TransmitReceive_DMA 19
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2347:19:HAL_SPI_Abort 18
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2509:19:HAL_SPI_Abort_IT 19
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2670:19:HAL_SPI_DMAPause 2
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2690:19:HAL_SPI_DMAResume 2
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2710:19:HAL_SPI_DMAStop 5
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2752:6:HAL_SPI_IRQHandler 21
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2859:13:HAL_SPI_TxCpltCallback 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2875:13:HAL_SPI_RxCpltCallback 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2891:13:HAL_SPI_TxRxCpltCallback 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2907:13:HAL_SPI_TxHalfCpltCallback 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2923:13:HAL_SPI_RxHalfCpltCallback 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2939:13:HAL_SPI_TxRxHalfCpltCallback 1
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../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2973:13:HAL_SPI_AbortCpltCallback 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3008:22:HAL_SPI_GetState 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3020:10:HAL_SPI_GetError 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3045:13:SPI_DMATransmitCplt 5
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3102:13:SPI_DMAReceiveCplt 6
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3219:13:SPI_DMATransmitReceiveCplt 4
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3320:13:SPI_DMAHalfTransmitCplt 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3338:13:SPI_DMAHalfReceiveCplt 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3356:13:SPI_DMAHalfTransmitReceiveCplt 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3374:13:SPI_DMAError 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3397:13:SPI_DMAAbortOnError 1
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3419:13:SPI_DMATxAbortCallback 6
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3486:13:SPI_DMARxAbortCallback 6
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3552:13:SPI_2linesRxISR_8BIT 5
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3637:13:SPI_2linesTxISR_8BIT 4
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3684:13:SPI_2linesRxISR_16BIT 3
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3740:13:SPI_2linesTxISR_16BIT 3
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3805:13:SPI_RxISR_8BIT 2
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3861:13:SPI_RxISR_16BIT 2
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3894:13:SPI_TxISR_8BIT 2
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3919:13:SPI_TxISR_16BIT 2
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3949:26:SPI_WaitFlagStateUntilTimeout 10
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4021:26:SPI_WaitFifoStateUntilTimeout 12
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4104:26:SPI_EndRxTransaction 9
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4140:26:SPI_EndRxTxTransaction 4
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4172:13:SPI_CloseRxTx_ISR 4
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4249:13:SPI_CloseRx_ISR 3
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4306:13:SPI_CloseTx_ISR 4
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4355:13:SPI_AbortRx_ISR 5
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4400:13:SPI_AbortTx_ISR 10

60
Debug/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.d Normal file
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Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.o: \
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \
../Core/Inc/stm32g4xx_hal_conf.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h:
../Core/Inc/stm32g4xx_hal_conf.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h:
../Drivers/CMSIS/Include/core_cm4.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h:
../Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h:

BIN
Debug/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.o Normal file
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Binary file not shown.

56
Debug/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.su Normal file
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../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:316:19:HAL_SPI_Init 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:491:19:HAL_SPI_DeInit 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:535:13:HAL_SPI_MspInit 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:551:13:HAL_SPI_MspDeInit 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:823:19:HAL_SPI_Transmit 40 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:1012:19:HAL_SPI_Receive 40 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:1255:19:HAL_SPI_TransmitReceive 48 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:1603:19:HAL_SPI_Transmit_IT 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:1685:19:HAL_SPI_Receive_IT 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:1789:19:HAL_SPI_TransmitReceive_IT 32 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:1897:19:HAL_SPI_Transmit_DMA 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2018:19:HAL_SPI_Receive_DMA 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2158:19:HAL_SPI_TransmitReceive_DMA 32 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2347:19:HAL_SPI_Abort 48 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2509:19:HAL_SPI_Abort_IT 40 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2670:19:HAL_SPI_DMAPause 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2690:19:HAL_SPI_DMAResume 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2710:19:HAL_SPI_DMAStop 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2752:6:HAL_SPI_IRQHandler 40 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2859:13:HAL_SPI_TxCpltCallback 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2875:13:HAL_SPI_RxCpltCallback 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2891:13:HAL_SPI_TxRxCpltCallback 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2907:13:HAL_SPI_TxHalfCpltCallback 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2923:13:HAL_SPI_RxHalfCpltCallback 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2939:13:HAL_SPI_TxRxHalfCpltCallback 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2955:13:HAL_SPI_ErrorCallback 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:2973:13:HAL_SPI_AbortCpltCallback 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3008:22:HAL_SPI_GetState 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3020:10:HAL_SPI_GetError 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3045:13:SPI_DMATransmitCplt 32 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3102:13:SPI_DMAReceiveCplt 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3219:13:SPI_DMATransmitReceiveCplt 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3320:13:SPI_DMAHalfTransmitCplt 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3338:13:SPI_DMAHalfReceiveCplt 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3356:13:SPI_DMAHalfTransmitReceiveCplt 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3374:13:SPI_DMAError 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3397:13:SPI_DMAAbortOnError 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3419:13:SPI_DMATxAbortCallback 40 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3486:13:SPI_DMARxAbortCallback 40 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3552:13:SPI_2linesRxISR_8BIT 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3637:13:SPI_2linesTxISR_8BIT 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3684:13:SPI_2linesRxISR_16BIT 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3740:13:SPI_2linesTxISR_16BIT 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3805:13:SPI_RxISR_8BIT 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3861:13:SPI_RxISR_16BIT 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3894:13:SPI_TxISR_8BIT 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3919:13:SPI_TxISR_16BIT 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:3949:26:SPI_WaitFlagStateUntilTimeout 40 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4021:26:SPI_WaitFifoStateUntilTimeout 48 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4104:26:SPI_EndRxTransaction 32 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4140:26:SPI_EndRxTxTransaction 32 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4172:13:SPI_CloseRxTx_ISR 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4249:13:SPI_CloseRx_ISR 16 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4306:13:SPI_CloseTx_ISR 24 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4355:13:SPI_AbortRx_ISR 32 static
../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c:4400:13:SPI_AbortTx_ISR 32 static

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