Files
FPGA_LVDS_PROTOCOL_ANALYSER/lvds_monitor.tcl
2026-06-10 09:32:26 +02:00

63 lines
2.2 KiB
Tcl

# lvds_monitor.tcl
#
# Quartus Prime Lite 25.1 project setup for the LVDS FlatLink monitor.
# Run from this directory:
#
# quartus_sh -t lvds_monitor.tcl
#
# Then open lvds_monitor.qpf in Quartus, or run a full compile with:
#
# quartus_sh --flow compile lvds_monitor
package require ::quartus::project
set proj "lvds_monitor"
if {[project_exists $proj]} {
project_open -force $proj
} else {
project_new -overwrite $proj
}
# ---- device / family ----
set_global_assignment -name FAMILY "Cyclone IV E"
set_global_assignment -name DEVICE EP4CE6E22C8
set_global_assignment -name TOP_LEVEL_ENTITY top
# ---- source files ----
set_global_assignment -name VERILOG_FILE de_monitor.v
set_global_assignment -name VERILOG_FILE uart_tx.v
set_global_assignment -name VERILOG_FILE top.v
set_global_assignment -name SDC_FILE lvds_monitor.sdc
# ---- generic compile options ----
set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
# ---- pin assignments ----
set_location_assignment PIN_24 -to clk_50mhz
set_location_assignment PIN_10 -to uart_tx_pin
set_location_assignment PIN_88 -to rst_n_pin
set_location_assignment PIN_30 -to rx_clk
set_location_assignment PIN_31 -to de
set_location_assignment PIN_32 -to vsync
set_location_assignment PIN_33 -to hsync
# ---- I/O standards ----
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to clk_50mhz
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to uart_tx_pin
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to rst_n_pin
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to rx_clk
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to de
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vsync
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to hsync
# Unused pins default — high-impedance is safest when wiring to a panel.
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
# Save and close.
export_assignments
project_close
puts "Project '$proj' created. Open lvds_monitor.qpf in Quartus."