Updated

mipi_test_interactive.py

@@ -59,7 +59,7 @@ SIG_SCALE  = 2e-9       # 2 ns/div → 20 ns window
 SIG_POINTS = 500_000
 
 # Pass 2 — protocol/frame structure (HS differential, jitter/freq)
-PROTO_SCALE  = 1e-6     # 1 µs/div → 10 µs window
+PROTO_SCALE  = 4e-6     # 4 µs/div → 40 µs window (was 1 µs/div)
 PROTO_POINTS = 500_000
 
 # Pass 3 — LP state capture (single-ended, widens vertical range to show LP-11)
@@ -700,12 +700,17 @@ def dual_capture(iteration: int) -> str:
     else:
         print("  SKIPPING SIG SAVE.")
 
-    # ── Pass 3: frame/protocol structure ──────────────────────────────────
-    print("  PASS 3: FRAME STRUCTURE...")
+    # ── Pass 3: frame/protocol structure (LP-triggered differential) ─────────
+    # Re-apply LP trigger so the LP-00 → HS transition lands near t=0 in F2.
+    # This gives a fixed byte-framing anchor: HS sync byte 0xB8 appears at
+    # t≈380 ns, followed by DI, WC, ECC, then the full pixel payload.
+    print("  PASS 3: FRAME STRUCTURE (LP-triggered differential)...")
+    _configure_for_lp()
     try:
         _set_timebase(PROTO_SCALE, PROTO_POINTS)
     except Exception:
         print("  SKIPPING PROTO SAVE.")
+        _restore_hs_config()
         _fetch_registers(ts, iteration)
         try:
             _set_timebase(5e-9, 500_000)
@@ -717,6 +722,7 @@ def dual_capture(iteration: int) -> str:
         _save_pass("proto", iteration, ts)
     else:
         print("  SKIPPING PROTO SAVE.")
+    _restore_hs_config()
 
     # ── DSI register snapshot ─────────────────────────────────────────────
     _fetch_registers(ts, iteration)