This commit is contained in:
david rice
2026-04-09 08:45:57 +01:00
parent 017c3b19f0
commit 2385fc6878
7 changed files with 321 additions and 14 deletions

View File

@@ -13,8 +13,10 @@ import sys
import requests
import threading
from datetime import datetime
from pathlib import Path
import ai_mgmt
import analyze_captures
import rigol_scope
# --- Configuration ---
URL = "http://192.168.45.8:5000/display"
@@ -42,6 +44,7 @@ LP_V_OFFSET = 0.6 # V — center display at 0.6 V (range 0.2 V to 1.4
LP_TRIG_LEVEL = 0.6 # V — midpoint of LP-11 (1.2 V) → LP-01 (0 V) fall
DISPLAY_SETTLE_S = 1.0 # seconds to wait after display ON before arming scope
DATA_DIR = Path(__file__).parent / "data"
test_running = False # controls both worker threads
resume_event = threading.Event() # cleared to pause test_worker, set to resume
@@ -57,6 +60,9 @@ except Exception as e:
print(f"ERROR: CANNOT CONNECT TO INSTRUMENTS: {e}")
sys.exit(1)
# Rigol DS1202Z-E for 1.8 V supply monitoring (optional — test continues if unavailable)
rigol_scope.connect()
# ---------------------------------------------------------------------------
def setup_scope():
@@ -299,16 +305,37 @@ def dual_capture(iteration):
else:
print(" SKIPPING PASS 2 SAVE.")
# ── Pass 3: LP / SoT structure ────────────────────────────────────────
# ── Pass 3: LP / SoT structure + 1.8 V supply monitoring ─────────────
# Widens vertical range to capture LP-11 (1.2 V) and falls-edge triggers
# on the LP-11 → LP-01 SoT transition. Saves Ch1 and Ch3 single-ended.
# Rigol is armed first (non-blocking) so the LP→HS current step droops
# the 1.8 V rail and triggers the Rigol while the Agilent captures.
print(" PASS 3: LP TRANSITION...")
_configure_for_lp()
_set_timebase(LP_SCALE, LP_POINTS)
if rigol_scope.is_connected():
rigol_scope.arm() # arm Rigol before LP trigger so it catches the droop
if _arm_and_wait(timeout=30):
_save_pass_channels("lp", iteration, ts)
else:
print(" SKIPPING PASS 3 SAVE.")
# Collect Rigol 1.8 V waveform (Agilent save takes ~5 s, Rigol should be done)
if rigol_scope.is_connected():
print(" PASS 3: WAITING FOR RIGOL 1.8 V CAPTURE...")
if rigol_scope.wait_captured(timeout_s=10.0):
DATA_DIR.mkdir(exist_ok=True)
v18_path = DATA_DIR / f"{ts}_pwr_{iteration:04d}_1v8.csv"
n = rigol_scope.read_waveform_csv(v18_path)
if n:
print(f" SAVED: {v18_path.name} ({n} samples)")
else:
print(" RIGOL: Waveform read returned 0 samples.")
else:
print(" RIGOL: Timed out waiting for capture.")
_restore_hs_config()
# ── Restore original timebase ─────────────────────────────────────────
@@ -396,9 +423,15 @@ def main_menu():
if choice == '1':
print(f"PSU : {psu.ask('*IDN?').strip()}")
print(f"SCOPE: {scope.ask('*IDN?').strip()}")
if rigol_scope.is_connected():
print(f"RIGOL: {rigol_scope.rigol.ask('*IDN?').strip()}")
else:
print("RIGOL: NOT CONNECTED")
elif choice == '2':
setup_scope()
if rigol_scope.is_connected():
rigol_scope.configure()
elif choice == '3':
psu.write('CH1:VOLT 24.0')
@@ -431,6 +464,7 @@ def main_menu():
test_running = False
psu.close()
scope.close()
rigol_scope.disconnect()
print("INSTRUMENTS CLOSED. BYE.")
break