MIPI Interactive Flicker Test Report

Generated: 2026-04-17 10:29:01  |  Model: claude-opus-4-6

D-PHY Configuration

Pixel clock: 72.0 MHz  |  Bit rate: 432.0 Mbit/s per lane  |  Byte clock: 54.000 MHz (18.519 ns/byte)  |  UI: 2.315 ns

✓ All D-PHY v1.1 Table 14 constraints satisfied.

Samsung DSIM Registers

u-boot Commands

# D-PHY PHY timing registers (pixel clock 72.0 MHz, 432.0 Mbit/s, byte clock 54.000 MHz)
#
# PHY_TIMING  (0xb4) = 0x00000306   lpx=3  hs_exit=6
# PHY_TIMING1 (0xb8) = 0x03110a04   clk_prepare=3  clk_zero=17  clk_post=10  clk_trail=4
# PHY_TIMING2 (0xbc) = 0x00040605   hs_prepare=4  hs_zero=6  hs_trail=5

# Enable Round-Up rounding (dsi-tweak bit 2)
setenv flb_dtovar "${flb_dtovar} dsi-tweak=4"

# Extra PHY cycles above Round-Up minimum
setenv flb_dtovar "${flb_dtovar} dsi-phy-extra-hs-prepare=1"
setenv flb_dtovar "${flb_dtovar} dsi-phy-extra-hs-trail=1"
setenv flb_dtovar "${flb_dtovar} dsi-phy-extra-clk-zero=3"

saveenv
boot

Event Log

Claude Assessments

Capture 0026 [20260417_095000] — FALSE ALARM

YES

The LP-low plateau of 33 ns is well below the SN65DSI83's required 50 ns minimum for reliable SoT detection, and the LP exit-to-HS transition of only 3 ns (versus the 50 ns spec minimum) confirms that the LP-01/LP-00 preamble states were too brief for the bridge to properly recognize the start-of-transmission. With these two critical timing violations—LP-low plateau at 66% of the required minimum and the LP exit duration at just 6% of spec—the bridge almost certainly missed the SoT, resulting in a lost or corrupted HS burst. The HS amplitude of 116 mV is healthy and the LP-11 voltage is in spec, so this is purely an LP timing issue causing the flicker, not a signal level problem.

Capture 0051 [20260417_100005] — FALSE ALARM

YES

The LP-low plateau of 27 ns is well below the SN65DSI83's required ≥ 50 ns minimum for reliable SoT detection, and the LP exit-to-HS transition time of 0.1 ns confirms the LP-01/LP-00 preamble states were essentially absent. Additionally, the HS amplitude of 42 mV is far below the normal 105–122 mV range and sits below the 50 mV threshold, indicating the bridge almost certainly failed to lock onto the HS data burst. These three compounding failures — insufficient LP-low plateau duration, missing LP exit timing, and sub-threshold HS amplitude — make it virtually certain the SN65DSI83 missed this SoT, resulting in a dropped or corrupted frame and visible flicker.

Capture 0052 [20260417_100044] — FALSE ALARM

YES

The LP-low plateau measured at 25.7–26 ns is roughly half the SN65DSI83's required ≥ 50 ns minimum, meaning the bridge almost certainly failed to detect the Start-of-Transmission. The LP exit-to-HS transition of 0–0.1 ns further confirms that the LP-01/LP-00 states were essentially absent or far too brief for reliable SoT recognition. Although the HS amplitude (128 mV) and LP-11 voltage (1.016 V) are within or near normal bounds, the critically short LP-low preamble is the dominant failure mode and would cause the SN65DSI83 to miss this HS burst, resulting in visible display flicker.

Capture 0053 [20260417_100121] — FALSE ALARM

YES

The LP-low plateau of 46.4 ns is below the SN65DSI83's required 50 ns minimum for reliable SoT detection, and the LP exit-to-HS transition of only 2.9–3 ns is drastically shorter than the 50 ns specification minimum, indicating the LP-01/LP-00 preamble states were too brief for the bridge to properly recognize the start-of-transmission. The HS amplitude of 131 mV, while indicating an HS burst did occur, is slightly above the normal 105–122 mV range, suggesting possible impedance or termination anomalies that could compound the timing issue. With both the LP-low plateau and LP exit duration failing spec, the SN65DSI83 almost certainly missed this SoT entry, resulting in a dropped or corrupted video frame and visible flicker.

Capture 0063 [20260417_100527] — FALSE ALARM

YES

The LP-low plateau is reported as `None` (absent), and the LP exit → HS transition time is 0 ns—both far below the SN65DSI83's required ≥ 50 ns LP-01/LP-00 preamble for reliable SoT detection. Additionally, the HS amplitude is 0 mV (well below the normal 105–122 mV range and below the 50 mV detection threshold), confirming the bridge almost certainly did not recognize valid HS data in this burst. Together, the missing LP-low preamble and absent HS signaling mean the SN65DSI83 would have failed to lock onto the start-of-transmission, producing a visible flicker event on the display.

Capture 0084 [20260417_101343] — FALSE ALARM

YES

The LP-low plateau of 42.9 ns is below the SN65DSI83's required 50 ns minimum for reliable SoT detection. Additionally, the LP exit-to-HS transition of only 1 ns (vs. the 50 ns spec minimum) indicates the LP-01/LP-00 preamble states were essentially skipped, making it nearly impossible for the bridge to recognize the start-of-transmission. The HS amplitude of 49 mV is also critically low—well below the normal 105–122 mV range and at the threshold of being classified as absent—which further confirms the bridge likely failed to lock onto the HS data burst. All three anomalies together make this a clear flicker event.

Capture 0087 [20260417_101509] — FALSE ALARM

YES

The LP-low plateau of 34.1 ns is well below the SN65DSI83's required ≥ 50 ns minimum for reliable SoT detection, falling short by nearly 16 ns (~32%). Additionally, the LP exit → HS transition time of 0 ns confirms the LP-01/LP-00 preamble states are essentially absent or too brief to be properly resolved, which the bridge needs to recognize the start-of-transmission sequence. Despite the HS amplitude (119 mV) and LP-11 voltage (1.016 V) being within normal operating ranges—indicating the PHY is otherwise functional—the truncated LP-low plateau means the SN65DSI83 will almost certainly miss this SoT event, causing a lost video line or frame and resulting in visible display flicker.

Capture 0092 [20260417_101718] — FALSE ALARM

YES

The LP-low plateau is completely absent (reported as `None` / 0 ns), far below the SN65DSI83's minimum 50 ns requirement for SoT detection. Additionally, the HS amplitude of only 5 mV is well below the normal 105–122 mV range and even below the 50 mV "absent" threshold, confirming the bridge could not have locked onto a valid HS data burst. Together, the missing LP-01/LP-00 preamble and effectively absent HS signaling mean the SN65DSI83 would have failed to recognize this transmission entirely, producing a dropped frame and visible flicker.