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MiPi_Investigation/analysis/__pycache__/waveform.cpython-312.pyc

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2026-05-06 15:57:48 +01:00
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<EFBFBD>d <0B><00>Zd$d <0C>Zd$d <0A>Zd%d<0E>Zd&d<0F>Z d' d(d<10>Zd)d<11>Zd)d<12>Zd*d<13>Zd*d<14>Zd*d<15>Zd)d<16>Zd+d<17>Z e f d,d<18>Z!dZ"dZ#dZ$eGd<1C>d<1D><00>Z% d-d<1E>Z& d.d<1F>Z'd/d <20>Z( d0 d1d!<21>Z)d2d"<22>Z* d3 d4d#<23>Z+y)5uaD-PHY timing extraction and Lane 0 packet decode from scope waveforms.
All voltage thresholds in this module are POST-attenuation values (i.e. what
the scope sees after the 19.2× probe divider). Don't rescale them back to
wire voltages — the divider is calibrated and the thresholds were chosen
to give clean LP/HS state separation at probe output.
<EFBFBD>)<01> annotationsN)<01> dataclass)<01>Optional)<01> DPHY_SPECg{<14>G<EFBFBD>z<EFBFBD>?g{<14>G<EFBFBD>z<EFBFBD>?g<><67><EFBFBD><EFBFBD>Mb<4D>?c<01>B<00>eZdZUdZded<ded<ded<ed d<07><04>Zy)
<EFBFBD> LaneStateSpanz5A contiguous run of single-ended-detected lane state.<2E>str<74>state<74>float<61>t_start<72>t_endc<01>:<00>|j|jz
dzS)N<>e<><65>A)r r )<01>selfs <20>analysis/waveform.py<70> duration_nszLaneStateSpan.duration_ns#s<00><00><14>
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__module__<EFBFBD> __qualname__<5F>__doc__<5F>__annotations__<5F>propertyr<00>rrrrs&<00><00>?<3F> <0E>J<EFBFBD> <12>N<EFBFBD> <10>L<EFBFBD> <0A>1<><0E>1rrc<01>f<00>tj|dj|djz
<00>S)N<> voltage_v<5F><03>pd<70>Series<65>values<65><02>lane_p<5F>lane_ns r<00> differentialr%,s,<00><00> <0A>9<EFBFBD>9<EFBFBD>V<EFBFBD>K<EFBFBD>(<28>/<2F>/<2F>&<26><1B>2E<32>2L<32>2L<32>L<> M<>Mrc<01>l<00>tj|dj|djzdz <00>S)Nrg@rr"s r<00> common_moder'0s2<00><00> <0A>9<EFBFBD>9<EFBFBD>f<EFBFBD>[<5B>)<29>0<>0<>6<EFBFBD>+<2B>3F<33>3M<33>3M<33>M<>QT<51>T<> U<>Urc<01><><00>t|<02>tkDr|tkr
|tkry|tkD}|tkD}|tk}|tk}|r|ry|r|ry|r|ry|r|ryy)z8Classify a single (p, n) sample into a D-PHY lane state.<2E>HS<48>LP-11<31>LP-01zLP-10<31>LP-00<30>TRANS)<04>abs<62> HS_DIFF_V<5F> LP_HIGH_V<5F>LP_LOW_V)<07>vp<76>vn<76>vdiff<66>p_high<67>n_high<67>p_low<6F>n_lows r<00>_classify_sampler98sd<00><00>
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}|| }<08>V|<07>|j t |||d<00><00>|S)u<>Walk both single-ended traces and emit consecutive state spans.
Spans labelled "TRANS" are dropped — they are sub-sample edge transitions,
not real D-PHY states. Adjacent same-state spans are merged.
<20>time_srNrr-<00><><EFBFBD><EFBFBD><EFBFBD>)r!<00>range<67>lenr9<00>appendr) r#r$<00>tr2r3<00>vd<76>spans<6E> cur_state<74> cur_start<72>i<>ss r<00> classify_lanerGKs<><00><00> <0F>x<EFBFBD><18><1F><1F>A<EFBFBD> <0F> <0B> <1C> #<23> #<23>B<EFBFBD> <0F> <0B> <1C> #<23> #<23>B<EFBFBD> <0B>b<EFBFBD><17>B<EFBFBD>!#<23>E<EFBFBD>#<23>I<EFBFBD><11>!<21><04>I<EFBFBD> <12>3<EFBFBD>q<EFBFBD>6<EFBFBD>]<5D> <1D><01> <1C>R<EFBFBD><01>U<EFBFBD>B<EFBFBD>q<EFBFBD>E<EFBFBD>2<EFBFBD>a<EFBFBD>5<EFBFBD> 1<><01> <0C><07><<3C> <14> <14> <1C><19>I<EFBFBD><19>!<21><04>I<EFBFBD> <14> <0C> <09>><3E> <11>L<EFBFBD>L<EFBFBD><1D>y<EFBFBD>)<29>Q<EFBFBD>q<EFBFBD>T<EFBFBD>B<> C<><19>I<EFBFBD><19>!<21><04>I<EFBFBD> <1D><11><1C> <0A> <0C> <0C>]<5D>9<EFBFBD>i<EFBFBD><11>2<EFBFBD><15>?<3F>@<40> <10>Lrc<01>n<00>t|t|<00><00>D]}||j|k(s<01>|||fcSy)N)r=r>r
)rBr
<00> start_idxrEs r<00> _first_spanrJms?<00><00> <12>9<EFBFBD>c<EFBFBD>%<25>j<EFBFBD> )<29><1F><01> <10><11>8<EFBFBD>><3E>><3E>U<EFBFBD> "<22><14>e<EFBFBD>A<EFBFBD>h<EFBFBD>;<3B> <1E><1F> rc<01>j<00>t||<01>}t|d<01>}|r|djStd<03>S)u@Duration of LP-01 (Dp low, Dn high) on data lane — HS Request.r+<00><00>nan)rGrJrr )<04> data_lane_p<5F> data_lane_nrB<00>hits r<00> measure_t_lpxrQ{s5<00><00> <19>+<2B>{<7B> 3<>E<EFBFBD>
<15>e<EFBFBD>W<EFBFBD>
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<00>D];}||jdk(s<01>||dzjdk(s<01>,||jcSt d<04>S)z=Duration of LP-00 on data lane immediately before HS-0 entry.rLr,r)rM<00>rGr=r>r
rr )rNrOrBrEs r<00>measure_t_hs_preparerT<00>sk<00><00> <19>+<2B>{<7B> 3<>E<EFBFBD> <12>3<EFBFBD>u<EFBFBD>:<3A><01>><3E> "<22>(<28><01> <10><11>8<EFBFBD>><3E>><3E>W<EFBFBD> $<24><15>q<EFBFBD>1<EFBFBD>u<EFBFBD><1C>);<3B>);<3B>t<EFBFBD>)C<><18><11>8<EFBFBD>'<27>'<27> '<27>(<28> <11><15><<3C>rc<01><><00>t||<01>}tt|<02>dz
<00>D];}||jdk(s<01>||dzjdk(s<01>,||jcSt d<04>S)zCDuration of LP-00 on clock lane immediately before HS clock starts.rLr,r)rMrS)<04>clk_p<5F>clk_nrBrEs r<00>measure_t_clk_preparerX<00>sk<00><00> <19>%<25><15> '<27>E<EFBFBD> <12>3<EFBFBD>u<EFBFBD>:<3A><01>><3E> "<22>(<28><01> <10><11>8<EFBFBD>><3E>><3E>W<EFBFBD> $<24><15>q<EFBFBD>1<EFBFBD>u<EFBFBD><1C>);<3B>);<3B>t<EFBFBD>)C<><18><11>8<EFBFBD>'<27>'<27> '<27>(<28> <11><15><<3C>rc<01>P<00>|dj}|dj|djz
}t||<01>}d}tt|<04>dz
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}n|<05> t d<07>Sttj||<05><00>}||}|dk\rd nd} t|dzt|<03><00>D]3}
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d
zcSt d<07>S) u<>Duration of HS-0 on clock lane before first clock toggle.
Implementation: find the LP-00 → HS transition, then walk the differential
until the first edge crossing in the opposite polarity (clock toggle).
r;rNrLr,r)rMrr<r<00> r!rGr=r>r
r r <00>int<6E>np<6E> searchsortedr/) rVrWr@rArB<00>hs_startrErI<00>initial<61>sign<67>js r<00>measure_t_clk_zerorb<00>s:<00><00> <0E>h<EFBFBD><0F><1E><1E>A<EFBFBD> <0E>{<7B> <1B> "<22> "<22>U<EFBFBD>;<3B>%7<>%><3E>%><3E> ><3E>B<EFBFBD> <19>%<25><15> '<27>E<EFBFBD> $<24>H<EFBFBD> <12>3<EFBFBD>u<EFBFBD>:<3A><01>><3E> "<22><12><01> <10><11>8<EFBFBD>><3E>><3E>W<EFBFBD> $<24><15>q<EFBFBD>1<EFBFBD>u<EFBFBD><1C>);<3B>);<3B>t<EFBFBD>)C<><1C>Q<EFBFBD><11>U<EFBFBD>|<7C>+<2B>+<2B>H<EFBFBD> <11><12><10><17><14>U<EFBFBD>|<7C><1B><13>B<EFBFBD>O<EFBFBD>O<EFBFBD>A<EFBFBD>x<EFBFBD>0<>1<>I<EFBFBD><10><19>m<EFBFBD>G<EFBFBD><18>A<EFBFBD><1C>2<EFBFBD>1<EFBFBD>D<EFBFBD> <12>9<EFBFBD>q<EFBFBD>=<3D>#<23>b<EFBFBD>'<27> *<2A>+<2B><01> <10>1<EFBFBD>H<EFBFBD><12>A<EFBFBD><15><19>*<2A><04>q<EFBFBD><08>R<EFBFBD><01>U<EFBFBD>i<EFBFBD>Z<EFBFBD>=O<><15>a<EFBFBD>D<EFBFBD>8<EFBFBD>O<EFBFBD>s<EFBFBD>*<2A> *<2A>+<2B> <11><15><<3C>rc<01><><00>t||<01>}t||<01>}tj|<02>stj|<03>r t d<01>S||zS)NrM)rXrbr\<00>isnanr )rVrW<00>a<>bs r<00>measure_t_clk_prepare_plus_zerorg<00>sB<00><00><1D>e<EFBFBD>U<EFBFBD>+<2B>A<EFBFBD><1A>5<EFBFBD>%<25>(<28>A<EFBFBD> <09>x<EFBFBD>x<EFBFBD><01>{<7B>b<EFBFBD>h<EFBFBD>h<EFBFBD>q<EFBFBD>k<EFBFBD><14>U<EFBFBD>|<7C><1B> <0C>q<EFBFBD>5<EFBFBD>Lrc<01>P<00>|dj}|dj|djz
}t||<01>}d}tt|<04>dz
<00>D]>}||jdk(s<01>||dzjdk(s<01>,||dzj
}n|<05> t d<07>Sttj||<05><00>}||}|dk\rd nd} t|dzt|<03><00>D]3}
| dkDr ||
tkDs| dks<01>||
t ks<01>(||
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d
zcSt d<07>S) z<>HS-0 preamble on data lane before SoT sync byte (00011101 = 0xB8 LSB-first).
Approximated as duration from HS entry until first differential transition
(i.e. first clock-edge-aligned bit flip).
r;rNrLr,r)rMrr<rrZ) rNrOr@rArBr^rErIr_r`ras r<00>measure_t_hs_zerori<00>s;<00><00> <14>H<EFBFBD><1D>$<24>$<24>A<EFBFBD> <14>[<5B> !<21> (<28> (<28>;<3B>{<7B>+C<>+J<>+J<> J<>B<EFBFBD> <19>+<2B>{<7B> 3<>E<EFBFBD> $<24>H<EFBFBD> <12>3<EFBFBD>u<EFBFBD>:<3A><01>><3E> "<22><12><01> <10><11>8<EFBFBD>><3E>><3E>W<EFBFBD> $<24><15>q<EFBFBD>1<EFBFBD>u<EFBFBD><1C>);<3B>);<3B>t<EFBFBD>)C<><1C>Q<EFBFBD><11>U<EFBFBD>|<7C>+<2B>+<2B>H<EFBFBD> <11><12><10><17><14>U<EFBFBD>|<7C><1B><13>B<EFBFBD>O<EFBFBD>O<EFBFBD>A<EFBFBD>x<EFBFBD>0<>1<>I<EFBFBD><10><19>m<EFBFBD>G<EFBFBD><18>A<EFBFBD><1C>2<EFBFBD>1<EFBFBD>D<EFBFBD> <12>9<EFBFBD>q<EFBFBD>=<3D>#<23>b<EFBFBD>'<27> *<2A>+<2B><01> <10>1<EFBFBD>H<EFBFBD><12>A<EFBFBD><15><19>*<2A><04>q<EFBFBD><08>R<EFBFBD><01>U<EFBFBD>i<EFBFBD>Z<EFBFBD>=O<><15>a<EFBFBD>D<EFBFBD>8<EFBFBD>O<EFBFBD>s<EFBFBD>*<2A> *<2A>+<2B> <11><15><<3C>rc <01><><00>|d}|d}|d}|d}t||<04>t||<04>t||<02>t||<02>t ||<02>t ||<04>d<05>S)N<>CLK_P<5F>CLK_N<5F>DAT0_P<5F>DAT0_N)<06>t_lpx<70> t_hs_prepare<72> t_clk_prepare<72>
t_clk_zero<EFBFBD>t_clk_prepare_plus_zero<72> t_hs_zero)rQrTrXrbrgri)<05> waveformsrVrW<00>dat_p<5F>dat_ns r<00> measure_allrx<00>sp<00><00> <15>g<EFBFBD> <1E>E<EFBFBD> <15>g<EFBFBD> <1E>E<EFBFBD> <15>h<EFBFBD> <1F>E<EFBFBD> <15>h<EFBFBD> <1F>E<EFBFBD><1E>u<EFBFBD>e<EFBFBD>,<2C>,<2C>U<EFBFBD>E<EFBFBD>:<3A>.<2E>u<EFBFBD>e<EFBFBD><<3C>(<28><15><05>6<>#B<>5<EFBFBD>%<25>#P<>&<26>u<EFBFBD>e<EFBFBD>4<>  <06>rc<01><00>i}|j<00>D]o\}}|j|<03>}|<05><01>|<04>tj|<04>r d|ddd<02>||<<00><t |<04>t |<05>t ||k\<00>t ||z
<00>d<02>||<<00>q|S)NF)<04> measured_ns<6E>min_ns<6E>pass<73> margin_ns)<06>items<6D>getr\rdr <00>bool)<06> measurements<74>spec<65>out<75>namerzr{s r<00>check_spec_compliancer<65><00>s<><00><00><1D>C<EFBFBD>)<29>/<2F>/<2F>1<>
<EFBFBD><19><04>k<EFBFBD><15><18><18>$<24><1E><06> <11>><3E> <14> <16> <1E>"<22>(<28>(<28>;<3B>"7<>#<23> <20><1D>!<21> <0E>C<EFBFBD><04>I<EFBFBD> <15> <20><1B>-<2D><1B>F<EFBFBD>m<EFBFBD><18><1B><06>.<2E>/<2F><1E>{<7B>V<EFBFBD>3<>4<> 
<EFBFBD><03>D<EFBFBD> <09>
<EFBFBD>$ <0F>Jr<00><><00>><00>!c<01>J<00>eZdZUded<ded<ded<ded<ded<ded <y
) <0B> DSIPacketr[<00> burst_idxr <00> timestamp_s<5F> data_type<70>
word_count<EFBFBD>ecc<63>bytes<65>payloadN)rrrrrrrr<>r<>s!<00><00><12>N<EFBFBD><16><16><12>N<EFBFBD><13>O<EFBFBD> <0C>H<EFBFBD> <12>Nrr<>c<01><><00>t||<03>}|D<00>cgc]*}|jdk(s<01>|j|jf<02><02>,c}Scc}w)z;Return (t_start, t_end) for each HS burst on the data lane.r))rGr
r r )rVrWrvrwrBrFs r<00>_find_hs_burstsr<73>s;<00><00> <1A>%<25><15> '<27>E<EFBFBD>*/<2F> C<>Q<EFBFBD>1<EFBFBD>7<EFBFBD>7<EFBFBD>d<EFBFBD>?<3F>Q<EFBFBD>Y<EFBFBD>Y<EFBFBD><01><07><07> <20> C<>C<><43> Cs
<00>A<04>Ac<01><><00>|dj}|dj|djz
}|dj}|dj|djz
} ttj||<04><00>}
ttj||<05><00>} | |
z
dkrgSg} ||
dk\rdnd} t |
dz| <0B>D]*}||dk\rdnd}|| k7s<01>| j ||<00>|} <0A>,g}| D]T}ttj||<11><00>}d|cxkrt | <09>ks<01>7n<00>:|j | |dkDrdnd<04><00>V|S)z<>DDR-sample the data lane at every clock edge inside the burst window.
Returns a list of 0/1 bit values, in clock-edge order.
r;r<00>rrLr<)r!r[r\r]r=r?r>)rVrWrvrwr r <00>t_clk<6C>vd_clk<6C>t_dat<61>vd_dat<61>i0<69>i1<69>edges<65> prev_sign<67>k<>cur_sign<67>bits<74>et<65>idxs r<00>_sample_bits_in_burstr<74>sU<00><00> <12>(<28>O<EFBFBD> "<22> "<22>E<EFBFBD> <12>;<3B> <1F> &<26> &<26><15>{<7B>);<3B>)B<>)B<> B<>F<EFBFBD> <11>(<28>O<EFBFBD> "<22> "<22>E<EFBFBD> <12>;<3B> <1F> &<26> &<26><15>{<7B>);<3B>)B<>)B<> B<>F<EFBFBD> <0C>R<EFBFBD>_<EFBFBD>_<EFBFBD>U<EFBFBD>G<EFBFBD> ,<2C> -<2D>B<EFBFBD> <0C>R<EFBFBD>_<EFBFBD>_<EFBFBD>U<EFBFBD>E<EFBFBD> *<2A> +<2B>B<EFBFBD> <09>B<EFBFBD>w<EFBFBD><11>{<7B><11> <09><1B>E<EFBFBD><1B>B<EFBFBD>Z<EFBFBD>1<EFBFBD>_<EFBFBD><01>"<22>I<EFBFBD> <12>2<EFBFBD><01>6<EFBFBD>2<EFBFBD> <1E>!<21><01><1E>q<EFBFBD> <09>Q<EFBFBD><0E>1<EFBFBD>B<EFBFBD><08> <13>y<EFBFBD> <20> <11>L<EFBFBD>L<EFBFBD><15>q<EFBFBD><18> "<22> <20>I<EFBFBD> !<21> <19>D<EFBFBD><13>5<><02><11>"<22>/<2F>/<2F>%<25><12>,<2C>-<2D><03> <0C><03> !<21>c<EFBFBD>&<26>k<EFBFBD> !<21> <10>K<EFBFBD>K<EFBFBD>V<EFBFBD>C<EFBFBD>[<5B>1<EFBFBD>_<EFBFBD><01>!<21> 4<>5<> <10>Krc<01><><00>t<00>}tdt|<00>dz
d<03>D]6}d}td<03>D]}|dz|||zdzz}<03>|j|<03><00>8t |<01>S)Nr<00><00>rL)<05> bytearrayr=r>r?r<>)r<>r<>rErfr<>s r<00>_bits_to_bytes_msb_firstr<74>:sr<00><00>
<13>+<2B>C<EFBFBD> <12>1<EFBFBD>c<EFBFBD>$<24>i<EFBFBD>!<21>m<EFBFBD>Q<EFBFBD> '<27><16><01> <0A><01><16>q<EFBFBD><18> -<2D>A<EFBFBD><12>a<EFBFBD><16>D<EFBFBD><11>Q<EFBFBD><15>K<EFBFBD>!<21>O<EFBFBD>,<2C>A<EFBFBD> -<2D> <0B>
<EFBFBD>
<EFBFBD>1<EFBFBD> <0A> <16>
<11><13>:<3A>rc <01><><00>|d}|d}|d}|d}t||||<05>}g}t|<06>D]<5D>\}\} }
t||||| |
<EFBFBD>} t| <0B>} | j t t g<01><00>} | dkst| <0C>| dzkr<01>Z| | dz| dz}|d}|d|dd zz}|d
}| dz}t||zt| <0C><00>}| ||}|jt|| ||||<14> <0B><00><00><>|S) u<>Best-effort DSI Lane 0 packet decode.
Scope window at 5 ns/div × 500 kpts is ~2.5 µs — enough for SoT + header
+ first ~200 bytes of payload. We only need the first few payload bytes
to classify Fault A (all-zero payload start).
rkrlrmrnr<00>rLr<>r<><00>)r<>r<>r<>r<>r<>r<>) r<><00> enumerater<65>r<><00>findr<64><00> DSI_SOT_SYNCr><00>minr?r<>)ru<00>max_payload_bytesrVrWrvrw<00>bursts<74>packetsr<73><00>t0<74>t1r<31><00>bs<62>sot_pos<6F>headerr<72>r<>r<><00> payload_start<72> payload_endr<64>s r<00>decode_lane0_packetsr<73>Ds<<00><00> <16>g<EFBFBD> <1E>E<EFBFBD> <15>g<EFBFBD> <1E>E<EFBFBD> <15>h<EFBFBD> <1F>E<EFBFBD> <15>h<EFBFBD> <1F>E<EFBFBD> <1C>U<EFBFBD>E<EFBFBD>5<EFBFBD>%<25> 8<>F<EFBFBD>!<21>G<EFBFBD>"<22>6<EFBFBD>*<2A> <0B> <0A><03>X<EFBFBD>b<EFBFBD>"<22>$<24>U<EFBFBD>E<EFBFBD>5<EFBFBD>%<25><12>R<EFBFBD>H<><04> %<25>d<EFBFBD> +<2B><02><14>'<27>'<27>%<25><1C><0E>/<2F>0<><07> <12>Q<EFBFBD>;<3B>#<23>b<EFBFBD>'<27>G<EFBFBD>a<EFBFBD>K<EFBFBD>/<2F> <14><13>G<EFBFBD>a<EFBFBD>K<EFBFBD>'<27>A<EFBFBD>+<2B>.<2E><06><1A>1<EFBFBD>I<EFBFBD> <09><1B>A<EFBFBD>Y<EFBFBD>&<26><11>)<29>q<EFBFBD>.<2E>1<>
<EFBFBD><14>Q<EFBFBD>i<EFBFBD><03><1F>!<21> <0B> <0A><19>-<2D>*;<3B>;<3B>S<EFBFBD><12>W<EFBFBD>E<> <0B><14>]<5D>;<3B>/<2F><07><0F><0E><0E>y<EFBFBD><19><1A><1F>!<21><13><1B> 
<EFBFBD> <0B># <0B>4 <13>Nrc<01>N<00>|D<00>cgc]}|jtk(s<01>|<01><02>}}|sddd<03>S|d}|jr|jddnd}t|<04>dk\xrt d <09>|ddD<00><00>}t |<05>|j <00>t|<02>t|<00>d
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